LT1793 Ver la hoja de datos (PDF) - Linear Technology
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LT1793 Datasheet PDF : 12 Pages
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TYPICAL PERFOR A CE CHARACTERISTICS
Short-Circuit Output Current
vs Temperature
40
VS = ±15V
35
30
SINK
SOURCE
25
20
15
10
– 75 – 50 – 25 0 25 50 75 100 125
TEMPERATURE (°C)
1793 G19
Supply Current vs Temperature
5
VS = ±15V
4
VS = ± 5V
3
– 75 – 50 – 25 0 25 50 75 100 125
TEMPERATURE (°C)
1793 G20
LT1793
Input Bias and Offset Currents
vs Chip Temperature
30n
10n
VS = ±15V
VCM = –10 TO 13V
3n
1n
300p
100p
BIAS
CURRENT
30p
10p
OFFSET
CURRENT
3p
1p
0.3p
0
25
50
75 100 125
TEMPERATURE (°C)
1793 G21
APPLICATI S I FOR ATIO
LT1793 vs the Competition
With improved noise performance, the LT1793 in the
PDIP directly replaces such JFET op amps as the OPA111
and the AD645. The combination of low current and
voltage noise of the LT1793 allows it to surpass most dual
and single JFET op amps. The LT1793 can replace many
of the lowest noise bipolar amps that are used in amplify-
ing low level signals from high impedance transducers.
The best bipolar op amps (with higher current noise) will
eventually lose out to the LT1793 when transducer im-
pedance increases.
100
CURRENT NOISE = √2qIB
80
60
40
OP215
20
LT1793
0
–20
AD822
–40
–60
–80
–100
–15 –10 –5 0
5 10 15
COMMON MODE RANGE (V)
1793 F01
Figure 1. Comparison of LT1793, OP215, and AD822
Input Bias Current vs Common Mode Range
The extremely high input impedance (1013Ω) assures that
the input bias current is almost constant over the entire
common mode range. Figure 1 shows how the LT1793
stands up to the competition. Unlike the competition, as the
input voltage is swept across the entire common mode
range the input bias current of the LT1793 hardly changes.
As a result the current noise does not degrade. This makes
the LT1793 the best choice in applications where an
amplifier has to buffer signals from a high impedance
transducer.
Offset nulling will be compatible with these devices with the
wiper of the potentiometer tied to the negative supply
(Figure 2a). No appreciable change in offset voltage drift
15V
15V
2–
3+
1
7
6
4
5
∆VOS = ±13mV
50k
2–
7
6
3+
4
5
1
∆VOS = ±1.3mV
10k 10k
– 15V
50k
– 15V
1793 F02
(a)
(b)
Figure 2
7
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