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LT1715IMS

4ns, 150MHz Dual Comparator with Independent Input/Output Supplies

Linear Technology 

LT1715

APPLICATIONS INFORMATION

Power Supply Configurations

The LT1715 has separate supply pins for the input and

output stages that allow flexible operation, accommodating

separate voltage ranges for the analog input and the output

logic. Of course, a single 3V/5V supply may be used by

tying +VS and VCC together as well as GND and VEE.

The minimum voltage requirement can be simply stated

as both the output and the input stages need at least 2.7V

and the VEE pin must be equal to or less than ground.

The following rules must be adhered to in any configuration:

2.7V ≤ (VCC – VEE) ≤ 12V

2.7V ≤ (+VS – GND) ≤ 6V

(+VS – VEE)) ≤ 12V

VEE ≤ Ground

Although the ground pin need not be tied to system ground,

most applications will use it that way. Figure 1 shows three

common configurations. The final one is uncommon, but

it will work and may be useful as a level translator; the

2.7V TO 6V

VCC

+

+VS

–

GND

VEE

Single Supply

5V

VCC

+

–

VEE

–5V

3V

+VS

GND

±5V Input, 3V Output Supplies

12V

VCC

+

–

VEE

5V

+VS

GND

12V Input, 5V Output Supplies

VCC

+

3V

+VS

–

GND

VEE

–5.2V

1715 F01

Front End Entirely Negative

Figure 1. Variety of Power Supply Configurations

input stage is run from –5.2V and ground while the output

stage is run from 3V and ground. In this case the com-

mon mode input voltage range does not include ground,

so it may be helpful to tie VCC to 3V. Conversely, VCC may

also be tied below ground, as long as the above rules are

not violated.

Input Voltage Considerations

The LT1715 is specified for a common mode range of

–100mV to 3.8V when used with a single 5V supply. A

more general consideration is that the common mode

range is 100mV below VEE to 1.2V below VCC. The crite-

rion for this common mode limit is that the output still

responds correctly to a small differential input signal. If

one input is within the common mode limit, the other

input signal can go outside the common mode limits, up

to the absolute maximum limits, and the output will retain

the correct polarity.

When either input signal falls below the negative common

mode limit, the internal PN diode formed with the substrate

can turn on, resulting in significant current flow through

the die. An external Schottky clamp diode between the

input and the negative rail can speed uprecovery from

negative overdrive by preventing the substrate diode from

turning on.

When both input signals are below the negative common

mode limit, phase reversal protection circuitry prevents

false output inversion to at least –400mV common mode.

However, the offset and hysteresis in this mode will increase

dramatically, to as much as 15mV each. The input bias

currents will also increase.

When one input signal goes above the common mode range

without exceeding a diode drop above the input supply rail,

the input stage will remain biased and the comparator will

maintain correct output polarity. Above this voltage, the

input stage current source will saturate completely and

the ESD protection diode will forward conduct. Once the

aberrant input falls back into the common mode range,

the comparator will respond correctly to valid input signals

within less than 10ns.

1715fa

9

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