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1506I Ver la hoja de datos (PDF) - Linear Technology

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1506I Datasheet PDF : 24 Pages
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LT1506
APPLICATIONS INFORMATION
40
GAIN
20
40
VIN = 10V
VOUT = 5V
IOUT = 2A
0
0
–40
PHASE
–20
–80
–40
10
100
1k
10k 100k
FREQUENCY (Hz)
–120
1M
1505 F10
Figure 10. Response from VC Pin to Output
Error amplifier transconductance phase and gain are shown
in Figure 11. The error amplifier can be modeled as a
transconductance of 2000µMho, with an output imped-
ance of 200kin parallel with 12pF. In all practical
applications, the compensation network from VC pin to
ground has a much lower impedance than the output
impedance of the amplifier at frequencies above 500Hz.
This means that the error amplifier characteristics them-
selves do not contribute excess phase shift to the loop, and
the phase/gain characteristics of the error amplifier sec-
tion are completely controlled by the external compensa-
tion network.
In Figure 12, full loop phase/gain characteristics are
shown with a compensation capacitor of 1.5nF, giving the
error amplifier a pole at 530Hz, with phase rolling off to 90°
and staying there. The overall loop has a gain of 74dB at
low frequency, rolling off to unity-gain at 100kHz. Phase
shows a two-pole characteristic until the ESR of the output
capacitor brings it back above 10kHz. Phase margin is
about 60° at unity-gain.
Analog experts will note that around 4.4kHz, phase dips
very close to the zero phase margin line. This is typical of
switching regulators, especially those that operate over a
wide range of loads. This region of low phase is not a
problem as long as it does not occur near unity-gain. In
practice, the variability of output capacitor ESR tends to
dominate all other effects with respect to loop response.
Variations in ESR will cause unity-gain to move around,
but at the same time phase moves with it so that adequate
phase margin is maintained over a very wide range of ESR
(≥ ±3:1).
3000
200
PHASE
2500
150
2000
GAIN
( ) 1500 VFB 2 × 10–3
ROUT
200k
100
VC
COUT
12pF
50
1000 ERROR AMPLIFIER EQUIVALENT CIRCUIT 0
RLOAD = 50
500
100
1k
10k
100k
FREQUENCY (Hz)
–50
1M 10M
1506 F11
Figure 11. Error Amplifier Gain and Phase
80
200
GAIN
60
150
40
100
PHASE
20
50
0
VIN = 10V
VOUT = 5V, IOUT = 2A
COUT = 100µF, 10V, AVX TPS
CC = 1.5nF, RC = 0, L = 10µH
–20
10
100
1k
10k
FREQUENCY (Hz)
0
–50
100k 1M
1505 F12
Figure 12. Overall Loop Characteristics
What About a Resistor in the Compensation Network?
It is common practice in switching regulator design to add
a “zero” to the error amplifier compensation to increase
loop phase margin. This zero is created in the external
network in the form of a resistor (RC) in series with the
compensation capacitor. Increasing the size of this resis-
tor generally creates better and better loop stability, but
there are two limitations on its value. First, the combina-
tion of output capacitor ESR and a large value for RC may
cause loop gain to stop rolling off altogether, creating a
gain margin problem. An approximate formula for RC
where gain margin falls to zero is:
( ) ( )( )( )( ) RC Loop Gain = 1 =
GMP
VOUT
GMA ESR
2.42
19

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