LFECP10E-4T144C Ver la hoja de datos (PDF) - Lattice Semiconductor

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LFECP10E-4T144C

LatticeECP/EC Family Data Sheet

Lattice Semiconductor 

Lattice Semiconductor

Figure 2-5. Distributed Memory Primitives

SPR16x2

AD0

AD1

AD2

AD3

DI0

DI1

WRE

CK

DO0

DO1

ROM16x1

AD0

AD1

AD2

DO0

AD3

Architecture

LatticeECP/EC Family Data Sheet

DPR16x2

WAD0

WAD1

WAD2

WAD3

DI0

DI1

WCK

WRE

RAD0

RAD1

RAD2

RAD3

RDO0

RDO1

WDO0

WDO1

ROM Mode: The ROM mode uses the same principal as the RAM modes, but without the Write port. Pre-loading is

accomplished through the programming interface during configuration.

PFU Modes of Operation

Slices can be combined within a PFU to form larger functions. Table 2-4 tabulates these modes and documents the

functionality possible at the PFU level.

Table 2-4. PFU Modes of Operation

Logic

Ripple

LUT 4x8 or

MUX 2x1 x 8

2-bit Add x 4

LUT 5x4 or

MUX 4x1 x 4

2-bit Sub x 4

LUT 6x 2 or

MUX 8x1 x 2

2-bit Counter x 4

LUT 7x1 or

MUX 16x1 x 1

2-bit Comp x 4

1. These modes are not available in PFF blocks

RAM1

SPR16x2 x 4

DPR16x2 x 2

SPR16x4 x 2

DPR16x4 x 1

SPR16x8 x 1

ROM

ROM16x1 x 8

ROM16x2 x 4

ROM16x4 x 2

ROM16x8 x 1

2-6

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