LC83015E Ver la hoja de datos (PDF) - SANYO -> Panasonic

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componentes Descripción

Fabricante

LC83015E

Digital Signal Processor for Audio Applications

SANYO -> Panasonic 

LC83015E

Specifications

Absolute Maximum Ratings

Supply voltage

Input voltage

Output voltage

Parameter

OSC2 output voltage

Audio data and external memory interface

output current

SO, SOAK and SIAK output current

P0 to P5 output current

Allowable power dissipation

Operating temperature

Storage temperature

Symbol

VDD1, VDD2, VDD3

VI

VO1

VO2

IO1

IO2

IO3

Pd max

Topr

Tstg

See note 1.

Conditions

Ratings

Unit

– 0.3 to +7.0 V

– 0.3 to VDD +0.3 V

– 0.3 to VDD +0.3 V

Up to approved

oscillator voltage

V

– 2 to +4 mA

– 2 to +10 mA

– 1 to +10 mA

700 mW

– 30 to +70 ˚C

– 40 to +125 ˚C

Note

1. Pins ASO, AOTDF1, AOTDF2, FS384O, FS192O, FS128O, FS64O, FS32O, AOWCK, LRCKO, D0 to D7, A0 to A16,

RAS, CAS, DREAD, DWRT and CE/CS

Recommended Operating Conditions at Ta = –30 to +70˚C, VSS1 to VSS4 = 0V

Parameter

Symbol

Conditions

Supply voltage range

VDD1, VDD2, VDD3

Ratings

Unit

4.75 to 5.25 V

Electrical Characteristics at Ta = –30 to +70˚C, VDD1 to VDD3 = 4.75 to 5.25 V, VSS1 to VSS4 = 0V

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Current drain

Audio data and external memory interface low-

level input voltage

IDD

VIL1

25MHz external clock. See note 8.

See note 1.

50

105 mA

0.8 V

Audio data and external memory interface high-

level input voltage

VIH1 See note 1.

2.4

V

Low-level input voltage

High-level input voltage

Serial interface low-level input voltage

Serial interface high-level input voltage

Low-level output voltage

High-level output voltage

RES and INT low-level input current

P0 to P5 low-level input current

Other low-level input current

SELC, SACK1 and SACK2 high-level input

current

VIL2

VIH2

VIL3

VIH3

VOL

VOH

IIL1

IIL2

IIL3

IIH1

See note 2.

See note 2.

See note 3.

See note 3.

IOL=2mA

IOL=10mA

IOH=– 0.4mA

IOH=– 50µA

VI=VSS

VI=VSS

VI=VSS

VI=VDD

0.7VDD

0.75VDD

4.0

VDD– 1.2

– 250

– 1000

– 10

0.3VDD V

V

0.25VDD V

V

0.4

V

1.5

V

µA

µA

µA

250 µA

High-level input current

RAS, CAS, DWRT, DREAD and CE/CS total

output current

IIH2

∑ IOA1

VI=VDD

10 µA

– 10

+10 mA

D0 to D7 and A0 to A16 total output current

Total output current

Total output current

Output leakage current

Input capacitance

∑ IOA2

∑ IOA3

∑ IOA4

IOFF

CI

See note 6.

See note 7.

– 20

+20 mA

– 15

+15 mA

– 10

+10 mA

– 40

+40 µA

10 pF

Notes

1. Pins BCK1, BCK2, ASI1, ASI2, LRCKI and D0 to D7. Schmitt trigger inputs

2. Pins P0 to P5, TEST1 to TEST4, SELC, SACK1 and SACK2

3. Pins RES, INT, SI, SICK, SIRQ, SRDY, SOCK, SORQ, FS384I and OSC1. Schmitt trigger inputs

4. Pins ASO, AOTDF1, AOTDF2, FS384O, FS192O, FS128O, FS64O, FS32O, AOWCK, LRCKO, D0 to D7, A0 to A16,

RAS, CAS, DREAD, DWRT and CE/CS. TTL-level outputs

5. Pins RAS, CAS, DWRT, DREAD and CE/CS

6. Pins FS384O, FS192O, FS128O, FS64O, FS32O, LRCKO, AOWCK, ASO and AOTDF1/2

7. Pins SIAK, SRDY, SO, SOAK and P0 to P5

8. See section DESIGN NOTES for measurement conditions.

No.4013–4/13

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