LC4128C-10T128I Ver la hoja de datos (PDF) - Lattice Semiconductor

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componentes Descripción

Fabricante

LC4128C-10T128I

3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

Lattice Semiconductor 

Lattice Semiconductor

ispMACH 4000V/B/C/Z Family Data Sheet

I/O DC Electrical Characteristics

Over Recommended Operating Conditions

Standard

Min (V)

VIL

Max (V)

VIH

Min (V)

VOL

Max (V) Max (V)

VOH

Min (V)

IOL1 IOH1

(mA) (mA)

LVTTL

-0.3

0.80

2.0

5.5

0.40 VCCO - 0.40 8.0 -4.0

0.20 VCCO - 0.20 0.1 -0.1

LVCMOS 3.3

-0.3

0.80

2.0

5.5

0.40 VCCO - 0.40 8.0 -4.0

0.20 VCCO - 0.20 0.1 -0.1

LVCMOS 2.5

-0.3

0.70

1.70

3.6

0.40 VCCO - 0.40 8.0 -4.0

0.20 VCCO - 0.20 0.1 -0.1

LVCMOS 1.8

(4000V/B)

-0.3

0.63

1.17

3.6

0.40 VCCO - 0.45 2.0 -2.0

0.20 VCCO - 0.20 0.1 -0.1

LVCMOS 1.8

(4000C/Z)

-0.3

0.35 * VCC

0.65 * VCC

3.6

0.40 VCCO - 0.45 2.0 -2.0

0.20 VCCO - 0.20 0.1 -0.1

PCI 3.3 (4000V/B) -0.3

1.08

1.5

5.5 0.1 VCCO 0.9 VCCO 1.5 -0.5

PCI 3.3 (4000C/Z) -0.3 0.3 * 3.3 * (VCC / 1.8) 0.5 * 3.3 * (VCC / 1.8) 5.5 0.1 VCCO 0.9 VCCO 1.5 -0.5

1. The average DC current drawn by I/Os between adjacent bank GND connections, or between the last GND in an I/O bank and the end of

the I/O bank, as shown in the logic signals connection table, shall not exceed n*8mA. Where n is the number of I/Os between bank GND

connections or between the last GND in a bank and the end of a bank.

20

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