LC4128C-10T128I Ver la hoja de datos (PDF) - Lattice Semiconductor

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LC4128C-10T128I

3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs

Lattice Semiconductor 

Lattice Semiconductor

ispMACH 4000V/B/C/Z Family Data Sheet

I/O Recommended Operating Conditions

Standard

Min.

VCCO (V)1

Max.

LVTTL

3.0

3.6

LVCMOS 3.3

3.0

3.6

Extended LVCMOS 3.32

2.7

3.6

LVCMOS 2.5

2.3

2.7

LVCMOS 1.8

1.65

1.95

PCI 3.3

3.0

3.6

1. Typical values for VCCO are the average of the min. and max. values.

2. ispMACH 4000Z only.

DC Electrical Characteristics

Over Recommended Operating Conditions

Symbol

Parameter

Condition

Min.

Typ.

Max. Units

IIL, IIH1, 4

Input Leakage Current (ispMACH

4000Z)

0 ≤ VIN < VCCO

—

0.5

1

µA

IIH1

Input High Leakage Current

(ispMACH 4000Z)

VCCO < VIN ≤ 5.5V

—

—

10

µA

IIL, IIH1

Input Leakage Current (ispMACH

4000V/B/C)

IIH1,2

Input High Leakage Current

(ispMACH 4000V/B/C)

I/O Weak Pull-up Resistor Current

(ispMACH 4000Z)

IPU

I/O Weak Pull-up Resistor Current

(ispMACH 4000V/B/C)

0 ≤ VIN ≤ 3.6V, Tj = 105°C

0 ≤ VIN ≤ 3.6V, Tj = 130°C

3.6V < VIN ≤ 5.5V, Tj = 105°C

3.0V ≤ VCCO ≤ 3.6V

3.6V < VIN ≤ 5.5V, Tj = 130°C

3.0V ≤ VCCO ≤ 3.6V

0 ≤ VIN ≤ 0.7VCCO

0 ≤ VIN ≤ 0.7VCCO

—

—

10

µA

—

—

15

µA

—

—

20

µA

—

—

50

µA

-30

—

-150

µA

-30

—

-200

µA

IPD

I/O Weak Pull-down Resistor Current VIL (MAX) ≤ VIN ≤ VIH (MIN)

30

—

150

µA

IBHLS Bus Hold Low Sustaining Current VIN = VIL (MAX)

30

—

—

µA

IBHHS Bus Hold High Sustaining Current VIN = 0.7 VCCO

-30

—

—

µA

IBHLO Bus Hold Low Overdrive Current

0V ≤ VIN ≤ VBHT

—

—

150

µA

IBHHO Bus Hold High Overdrive Current

VBHT ≤ VIN ≤ VCCO

—

—

-150

µA

VBHT Bus Hold Trip Points

—

VCCO * 0.35 — VCCO * 0.65 V

C1

I/O Capacitance3

VCCO = 3.3V, 2.5V, 1.8V

—

—

8

pf

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

—

C2

Clock Capacitance3

VCCO = 3.3V, 2.5V, 1.8V

—

—

6

pf

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

—

C3

Global Input Capacitance3

VCCO = 3.3V, 2.5V, 1.8V

—

—

6

pf

VCC = 1.8V, VIO = 0 to VIH (MAX)

—

—

1. Input or I/O leakage current is measured with the pin configured as an input or as an I/O with the output driver tristated. It is not

measured with the output driver active. Bus maintenance circuits are disabled.

2. 5V tolerant inputs and I/O should only be placed in banks where 3.0V ≤ VCCO ≤ 3.6V.

3. TA = 25°C, f = 1.0MHz

4. IIH excursions of up to 1.5µA maximum per pin above the spec limit may be observed for certain voltage conditions on no more than 10% of

the device’s I/O pins.

16

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