LB11872H(2002) Ver la hoja de datos (PDF) - SANYO -> Panasonic
Número de pieza
componentes Descripción
Fabricante
LB11872H Datasheet PDF : 13 Pages
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LB11872H
Allowable Operating Ranges at Ta = 25°C
Parameter
Supply voltage range
6.3 V regulator-voltage output current
LD pin applied voltage
LD pin output current
FGS pin applied voltage
FGS pin output current
Symbol
VCC
IREG
VLD
ILD
VFG
IFG
Conditions
Ratings
Unit
10 to 28
V
0 to –20
mA
0 to 28
V
0 to 15
mA
0 to 28
V
0 to 10
mA
Electrical Characteristics at Ta = 25°C, VCC = VM = 24 V
Parameter
Symbol
Conditions
Supply current 1
Supply curren 2
[Output Saturation Voltages VAGC = 3.5 V]
SOURCE (1)
SOURCE (2)
SINK (1)
SINK (2)
Output leakage current
[6.3 V Regulator-Voltage Output]
Output voltage
Voltage regulation
Load regulation
Temperature coefficient
[Hall Amplifier Block]
Input bias current
Differential input voltage range
Common-phase input voltage range
Input offset voltage
[FG Amplifier and Schmitt Block (IN1)]
Input amplifier gain
Input hysteresis (high to low)
Input hysteresis (low to high)
Hysteresis width
[Low-Voltage Protection Circuit]
Operating voltage
Hysteresis width
[Thermal Protection Circuit]
Thermal shutdown operating temperature
Hysteresis width
[Current Limiter Operation]
Acceleration limit voltage
Deceleration limit voltage
[Error Amplifier]
Input offset voltage
Input bias current
High-level output voltage
Low-level output voltage
DC bias level
[Phase Comparator Output]
High-level output voltage
Low-level output voltage
Output source current
Output sink current
ICC1
ICC2
Stop mode
Start mode
VSAT1-1 IO = 0.5 A, RF = 0 Ω
VSAT1-2 IO = 1.0 A, RF = 0 Ω
VSAT2-1 IO = 0.5 A, RF = 0 Ω
VSAT2-2 IO = 1.0 A, RF = 0 Ω
IO (LEAK) VCC = 28 V
VREG
∆VREG1 VCC = 9.5 to 28 V
∆VREG2 Iload = –5 to –20 mA
∆VREG3 Design target value
IB (HA)
VHIN
VICM
VIOH
Differential input: 50 mVp-p
SIN wave input
Differential input: 50 mVp-p
Design target value
GFG
VSHL
VSLH
VFGL
Input conversion
VSD
∆VSD
TSD
∆TSD
Design target value (junction temperature)
Design target value (junction temperature)
VRF1
VRF2
VIO (ER) Design target value
IB (ER)
VOH (ER) IOH = –500 µA
VOL (ER) IOL = 500 µA
VB (ER)
VPDH
VPDL
IPD+
IPD–
IOH = –100 µA
IOL = 100 µA
VPD = VREG/2
VPD = VREG/2
min
5.90
50
2.0
–20
4
8.4
0.2
150
0.53
0.32
–10
–1
VREG – 1.2
–5%
VREG – 0.2
1.5
Note*: Since kickback can occur in the output waveform if the Hall input amplitude is too large, the Hall input
amplitudes should be held to under 350 mVp-p.
Ratings
typ
5
17
Unit
max
7 mA
22 mA
1.7
2.2
V
2.0
2.7
V
0.4
0.9
V
1.0
1.7
V
100
µA
6.25
6.60
V
50
100 mV
10
60 mV
0
mV/°C
2
10
µA
*600 mVp-p
VCC – 2.5
V
20 mV
5
deg
0
mV
–10
mV
7
12 mV
8.8
9.2
V
0.4
0.6
V
180
°C
40
°C
0.59
0.65
V
0.37
0.42
V
VREG – 0.9
0.9
1/2VREG
10 mV
1
µA
V
1.2
V
5%
V
VREG – 0.1
0.2
V
0.3
V
–500
µA
mA
Continued on next page.
No. 7257 -2/13
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