L6563S Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza

componentes Descripción

Fabricante

L6563S

Enhanced transition-mode PFC controller

STMicroelectronics 

Pin connection

3

Pin connection

Figure 2. Pin connection

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Table 3. Pin description

n° Name

Function

Inverting input of the error amplifier. The information on the output voltage of the PFC pre-

regulator is fed into the pin through a resistor divider.

1

INV

The pin normally features high impedance but, if the tracking boost function is used, an internal

current generator programmed by TBO (pin 6) is activated. It sinks current from the pin to

change the output voltage so that it tracks the mains voltage.

Output of the error amplifier. A compensation network is placed between this pin and INV (pin

1) to achieve stability of the voltage control loop and ensure high power factor and low THD.

2

COMP

To avoid uncontrolled rise of the output voltage at zero load, when the voltage on the pin falls

below 2.4 V the gate driver output will be inhibited (burst-mode operation).

Mains input to the multiplier. This pin is connected to the rectified mains voltage via a resistor

3

MULT divider and provides the sinusoidal reference to the current loop. The voltage on this pin is used

also to derive the information on the RMS mains voltage.

Input to the PWM comparator. The current flowing in the MOSFET is sensed through a resistor,

the resulting voltage is applied to this pin and compared with an internal reference to determine

MOSFET’s turn-off.

4

CS

A second comparison level at 1.7 V detects abnormal currents (e.g. due to boost inductor

saturation) and, on this occurrence, activates a safety procedure that temporarily stops the

converter and limits the stress of the power components.

Second input to the multiplier for 1/V2 function. A capacitor and a parallel resistor must be

connected from the pin to GND. They complete the internal peak-holding circuit that derives the

5

VFF

information on the RMS mains voltage. The voltage at this pin, a dc level equal to the peak

voltage on pin MULT (3), compensates the control loop gain dependence on the mains voltage.

Never connect the pin directly to GND but with a resistor ranging from 100 kΩ (minimum)

to 2 MΩ (maximum).

Tracking boost function. This pin provides a buffered VFF voltage. A resistor connected

6

TBO

between this pin and GND defines a current that is sunk from pin INV (#1). In this way, the

output voltage is changed proportionally to the mains voltage (tracking boost). If this function is

not used leave this pin open.

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Doc ID 16116 Rev 4

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