L5994 Ver la hoja de datos (PDF) - STMicroelectronics

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componentes Descripción

Fabricante

L5994

ADJUSTABLE TRIPLE OUTPUT POWER SUPPLY CONTROLLER

STMicroelectronics 

L5994 - L5994A

PIN DESCRIPTION

N°

Name

Function

1

H1STRAP Section 1 bootstrap capacitor connection. A bootstrap capacitor must be connected between

this pin and pin H1SRC to supply the H1GATE driver.

2

Vin

Device supply voltage.

3

SREG5 Internal logic supply. It must be connected to PREG5 pin through a R-C low-pass filter.

4

V5SW Alternative supply voltage for the internal 5V regulator. If its voltage is greater than 4.5V, the

internal regulator is supplied via this pin. If left floating, the regulator is supplied through the

Vin pin.

5

V1SNS This pin connects the (-) input of section 1 current sense comparator. It must be connected

downstream the external RSENSE resistor.

6

I1SNS This pin connects the (+) input of section 1 current sense comparator. It must be connected

upstream the external RSENSE resistor.

7

COMP1 Feedback input for section 1. It must be connected directly or through a resistor divider to the

output of the section 1.

8

SOFT1 Soft start connection for section 1. The soft start time is programmed by an external capacitor

connected between this pin and SGND. Approximatively 0.7ms/nF.

9

CRST Used for start-up and shut-down timing. A capacitor must be connected between this pin and

SGND defining a time of 1.47ms/nF.

10

PWROK1 Power Good open drain diagnostic signal. This output is in high inpedence when sect. 1 is

enabled and running properly after a delay defined by the CRST capacitor. When not used

may be left floating.

11

RUN1 Control input to enable / disable the section 1. A high logic level (>2.4V) enables this section,

a low level (<0.8V) shuts it down.

12

Vref Internal 2.5V high accuracy voltage generator. It can source 5mA to external load. Bypass to

SGND with a 4.7uF electrolytic capacitor to reduce noise.

13

SGND Signal ground. Reference for internal logic circuitry. It must be routed separately from high

current returns.

14

NOSKIP Pulse skipping mode control. A high logic level (>2.4V) disables pulse skipping at low load

current, a low level (<0.8V) enables it.

15

OSC Oscillator frequency control: connect to 2.5V to select 300kHz operation, connect to ground or

to 5V for 200kHz operation.

A proper external signal can synchronise the oscillator

16

RUN2 Control input to enable / disable the section 2. A high logic level (>2.4V) enables this section,

a low level (<0.8V) shuts it down.

17

SOFT2 Soft start connection for section 2. The soft start time is programmed by an external capacitor

connected between this pin and SGND. Approximatively 0.7ms/nF.

18

COMP2 Feedback input for section 2. It must be connected directly or through a resistor divider to the

output of the section 2.

19

I2SNS This pin connects the (+) input of section 2 current sense comparator. It must be connected

upstream the external RSENSE resistor.

20

V2SNS This pin connects the (-) input of section 2 current sense comparator. It must be connected

downstream the external RSENSE resistor.

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