MAX189BCPA Ver la hoja de datos (PDF) - Maxim Integrated

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MAX189BCPA

+5V, Low-Power, 12-Bit Serial ADCs

Maxim Integrated 

+5V, Low-Power, 12-Bit Serial ADCs

4.7µF

0.1µF

+5V

ANALOG INPUT

0V TO +5V

SHUTDOWN

INPUT

ON

OFF

4.7µF

1 VDD

SCLK 8

2 AIN MAX187 CS 7

3 SHDN

4 REF

DOUT 6

GND 5

Figure 3a. MAX187 Operational Diagram

4.7µF

0.1µF

SERIAL

INTERFACE

+5V

ANALOG INPUT

0V TO +5V

SHUTDOWN

INPUT

ON

OFF

REFERENCE

INPUT

0.1µF

1 VDD

SCLK 8

2 AIN MAX189 CS 7

3 SHDN

4 REF

DOUT 6

GND 5

Figure 3b. MAX189 Operational Diagram

SERIAL

INTERFACE

12-BIT CAPACITIVE DAC

REF

AIN

TRACK INPUT CHOLD

-+

16pF

HOLD

CPACKAGE

CSWITCH

TRACK

GND

COMPARATOR

ZERO

5k

RIN

HOLD

AT THE SAMPLING INSTANT,

THE INPUT SWITCHES FROM

AIN TO GND.

Figure 4. Equivalent Input Circuit

Track/Hold

In track mode, the analog signal is acquired and stored

in the internal hold capacitor. In hold mode, the T/H

switch opens and maintains a constant input to the

ADC’s SAR section.

During acquisition, the analog input AIN charges

capacitor CHOLD. Bringing CS low ends the acquisition

interval. At this instant, the T/H switches the input side

of CHOLD to GND. The retained charge on CHOLD rep-

resents a sample of the input, unbalancing the node

ZERO at the comparator’s input.

In hold mode, the capacitive DAC adjusts during the

remainder of the conversion cycle to restore node

ZERO to 0V within the limits of a 12-bit resolution. This

action is equivalent to transferring a charge from

CHOLD to the binary-weighted capacitive DAC, which in

turn forms a digital representation of the analog input

signal. At the conversion’s end, the input side of CHOLD

switches back to AIN, and CHOLD charges to the input

signal again.

The time required for the T/H to acquire an input signal

is a function of how quickly its input capacitance is

charged. If the input signal’s source impedance is

high, the acquisition time lengthens and more time

must be allowed between conversions. Acquisition time

is calculated by:

tACQ = 9 (RS + RIN) 16pF,

where RIN = 5kΩ, RS = the source impedance of the

input signal, and tACQ is never less than 1.5µs. Source

impedances below 5kΩ do not significantly affect the

AC performance of the ADC.

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