Philips Semiconductors
Multimedia video data acquisition circuit
Objective specification
SAA5284
SYMBOL
PIN
OSCGND
9
SEL0
10
SEL1
11
BLACK
12
IREF
13
CVBS1
14
CVBS0
15
VDDA
16
VSSA
17
VSSD1
18
VSSD2
19
D7(1)
20
D6(1)
21
D5(1)
22
D4(1)
23
D3(1)
24
D2(1)
25
D1(1)
26
D0(1)
27
A0(1)
28
A1(1)
29
A2(1)
30
INT
31
RDY(1)
32
WR(1)
33
RD(1)
34
CS0
35
DMARQ
36
DMACK(1)
37
VPOIN0
38
VPOIN1
39
VSSD3
40
VDDD
41
LLC
42
LLC2
43
CS1
44
I/O
DESCRIPTION
−
oscillator ground
I
parallel interface format select 0
I
parallel interface format select 1
I/O
video black level storage; connected to VSSA via 100 nF capacitor
I
reference current input; connected to VSSA via 27 kΩ resistor
I
analog composite video input 1
I
analog composite video input 0
−
analog +5 V supply
−
analog ground supply
I
digital ground supply 1
I
digital ground supply 2
I/O
data bus 7/video data output 7
I/O
data bus 6/video data output 6
I/O
data bus 5/video data output 5
I/O
data bus 4/video data output 4
I/O
data bus 3/video data output 3
I/O
data bus 2/video data output 2
I/O
data bus 1/video data output 1
I/O
data bus 0/video data output 0
I
address input 0/video data input 7
I
address input 1/video data input 6
I
address input 2/video data input 5
O
interrupt request
O
ready/DTACK (data acknowledge)/VBI, open-drain
I
Intel bus Write/Motorola bus R/W/video data input 4
I
Intel bus Read/Motorola bus LDS/video data input 3
I
chip select 0; active LOW
O
DMA request
I
DMA acknowledge/video data input 2
I
video data input 0
I
video data input 1
−
digital ground supply 3
−
digital +5 V supply
I
full rate digital video clock input
I
half rate digital video clock input
I
chip select 1; active LOW
Note
1. These pins have two functions, depending on the interface mode.
1998 Feb 05
6