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KM681002B Ver la hoja de datos (PDF) - Samsung

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componentes Descripción
Fabricante
KM681002B Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
KM681002B, KM681002BI
WRITE CYCLE
Parameter
Symbol
KM681002B-8
Min
Max
Write Cycle Time
Chip Select to End of Write
Address Set-up Time
Address Valid to End of Write
Write Pulse Width( OE High)
Write Pulse Width( OE Low)
Write Recovery Time
Write to Output High-Z
Data to Write Time Overlap
Data Hold from Write Time
End Write to Output Low-Z
tWC
8
-
tCW
6
-
tAS
0
-
tAW
6
-
tWP
6
-
tWP1
8
-
tWR
0
-
tWHZ
0
4
tDW
4
-
tDH
0
-
tOW
3
-
NOTE: The above parameters are also guaranteed at industrial temperature range.
KM681002B-10
Min
Max
10
-
7
-
0
-
7
-
7
-
10
-
0
-
0
5
5
-
0
-
3
-
PRELIMINARY
PRPEreLlIiMmIiNnAarRyY
CMOS SRAM
KM681002B-12
Min
Max
12
-
8
-
0
-
8
-
8
-
12
-
0
-
0
6
6
-
0
-
3
-
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TIMMING DIAGRAMS
TIMING WAVEFORM OF READ CYCLE(1) (Address Controlled, CS=OE=VIL, WE=VIH)
Address
Data Out
tRC
tAA
tOH
Previous Valid Data
Valid Data
TIMING WAVEFORM OF READ CYCLE(2) (WE=VIH)
Address
CS
OE
Data out
VCC
ICC
Current
ISB
tRC
tAA
tCO
tOE
tOLZ
tLZ(4,5)
tPU
50%
tHZ(3,4,5)
Valid Data
tOHZ
tOH
tPD
50%
-5-
Rev 2.0
February 1998

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