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KB2512

DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

Samsung 

DEFLECTION PROCESSOR FOR MULTISYNC MONITORS

KB2512

Starting from the vertical ramp, a parabola shaped current is generated for E/W correction, dynamic horizontal

phase control correction, and vertical dynamic focus correction.

The base of the parabola generator is an analog multiplier, the output current of which is equal to:

∆I = k × (VOUT - VDCMID)2

Where Vout is the vertical output ramp (typically between 2 and 5V) and VDCMID is 3.5V (for VREF-V = 8V). One

more multiplier provides a current proportional to (Vout - VDCMID)4 for corner correction The VOUT sawtooth is

typically centered on 3.5V. By changing the vertical position, the sawtooth shifts by ±0.3V.

In order to keep a good screen geometry for any end user preference adjustment we implemented the geometry

tracking.

Due to large output stages voltage range (E/W, keystone corner), the combination of tracking function with

maximum vertical amplitude max or min vertical position and maximum gain on the DAC control may lead to the

output stages saturation. This must be avoided by limiting the output voltage by appropriate I2C registers values.

For E/W part and dynamic horizontal phase control part, a sawtooth shaped differential current in the following

form is generated:

∆I’ = k’ × (VOUT - VDCMID)2

Then ∆I and ∆I’are added together and converted into voltage for the E/W part.

Each of the three E/W components and the two dynamic horizontal phase control ones may be inhibited by their

own I2C select bit.

The E/W parabola is available on pin 24 by the way of an emitter follower which has to be biased by an external

resistor (10KΩ). It can be DC coupled with external circuitry.

The vertical dynamic focus is available on output pin 10. Dynamic horizontal phase control current drives internally

the H-position, moving the Hfly position on the horizontal sawtooth in the ± 1.4% The both on side pin balance and

parallelogram.

EW

EWOUT = 2.5V + K1 (VOUT - VDCMID) + K2 (VOUT - VDCMID)2 + K3 (Vout - VDCMID)4

K1 is adjustable by the keystone I2C register

K2 is adjustable by the EW amplitude I2C register

K3 is adjustable by the corner I2C register

Dynamic Horizontal Phase Control

IOUT = K4 (VOUT - VDCMID) 2 + K5 (VOUT - VDCMID)

K4 is adjustable by side pin balance I2C register

K5 is adjustable by parallelogram I2C register.

Function

When the Synchronization pulse is not present, an internal current source sets the free running frequency. For an

external capacitor, COSC = 150nF, the typical free running frequency is 100Hz.

Typical free running frequency can be calculated by:

fo(Hz ) = 1.5 ⋅ 10–5 ⋅ C-----O-1---S---C--

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