K7N801845M Ver la hoja de datos (PDF) - Samsung

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componentes Descripción

Fabricante

K7N801845M

256Kx36 & 512Kx18 Pipelined NtRAM

Samsung 

K7N803645M

K7N801845M

PIN CONFIGURATION(TOP VIEW)

256Kx36 & 512Kx18 Pipelined NtRAMTM

N.C.

1

N.C.

2

N.C.

3

VDDQ

4

VSSQ

5

N.C.

6

N.C.

7

DQb8

8

DQb7

9

VSSQ

10

VDDQ

11

DQb6

12

DQb5

13

VDD

14

VDD

15

VDD

16

VSS

17

DQb4

18

DQb3

19

VDDQ

20

VSSQ

21

DQb2

22

DQb1

23

DQb0

24

N.C.

25

VSSQ

26

VDDQ

27

N.C.

28

N.C.

29

N.C.

30

100 Pin TQFP

(20mm x 14mm)

K7N801845M(512Kx18)

80

A10

79

N.C.

78

N.C.

77

VDDQ

76

VSSQ

75

N.C.

74

DQa0

73

DQa1

72

DQa2

71

VSSQ

70

VDDQ

69

DQa3

68

DQa4

67

VSS

66

VDD

65

VDD

64

ZZ

63

DQa5

62

DQa6

61

VDDQ

60

VSSQ

59

DQa7

58

DQa8

57

N.C.

56

N.C.

55

VSSQ

54

VDDQ

53

N.C.

52

N.C.

51

N.C.

PIN NAME

SYMBOL

A0 - A18

ADV

WE

CLK

CKE

CS1

CS2

CS2

BWx

OE

ZZ

LBO

PIN NAME

Address Inputs

Address Advance/Load

Read/Write Control Input

Clock

Clock Enable

Chip Select

Chip Select

Chip Select

Byte Write Inputs

Output Enable

Power Sleep Mode

Burst Mode Control

TQFP PIN NO.

SYMBOL

32,33,34,35,36,37, VDD

44,45,46,47,48,49,50, VSS

80,81,82,83,99,100 N.C.

85

88

89

87

DQa0~a8

98

DQb0~b8

97

92

93,94

VDDQ

86

64

VSSQ

31

PIN NAME

TQFP PIN NO.

Power Supply(+2.5V)

Ground

No Connect

14,15,16,41,65,66,91

17,40,67,90

1,2,3,6,7,25,28,29,30,

38,39,42,43,51,52,53,

56,57,75,78,79,84,95,96

Data Inputs/Outputs 58,59,62,63,68,69,72,73,74

8,9,12,13,18,19,22,23,24

Output Power Supply 4,11,20,27,54,61,70,77

(+2.5V)

Output Ground

5,10,21,26,55,60,71,76

Notes : 1. The pin 84 is reserved for address bit for the 16Mb NtRAM.

2. A0 and A1 are the two least significant bits(LSB) of the address field and set the internal burst counter if burst is desired.

-5-

November 1999

Rev 3.0

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