K4S640432H Ver la hoja de datos (PDF) - Samsung

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K4S640432H

64Mb H-die SDRAM Specification 54 TSOP-II with Pb-Free (RoHS compliant)

Samsung 

SDRAM 64Mb H-die (x4, x8, x16)

DC CHARACTERISTICS

(Recommended operating condition unless otherwise noted, TA = 0 to 70°C for x4, x8)

Parameter

Symbol

Test Condition

Operating current

(One bank active)

Precharge standby current in

power-down mode

Precharge standby current in

non power-down mode

Active standby current in

power-down mode

Active standby current in

non power-down mode

(One bank active)

Burst length = 1

ICC1 tRC ≥ tRC(min)

IO = 0 mA

ICC2P CKE ≤ VIL(max), tCC = 10ns

ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞

ICC2N

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

Input signals are changed one time during 20ns

ICC2NS

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable

ICC3P CKE ≤ VIL(max), tCC = 10ns

ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞

ICC3N

CKE ≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

Input signals are changed one time during 20ns

ICC3NS

CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable

Operating current

(Burst mode)

Refresh current

IO = 0 mA

ICC4

Page burst

4Banks Activated

tCCD = 2CLKs

ICC5 tRC ≥ tRC(min)

C

Self refresh current

ICC6 CKE ≤ 0.2V

L

Notes : 1. Measured with outputs open.

2. Refresh period is 64ms.

3. K4S6404(08)32H-TC**

4. K4S6404(08)32H-TL**

5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ)

CMOS SDRAM

Version

75

75

1

1

15

6

3

3

30

25

115

135

1

400

Unit

Note

mA

1

mA

mA

mA

mA

mA

1

mA

2

mA

3

uA

4

Rev. 1.3 August 2004

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