RTL8305S Ver la hoja de datos (PDF) - Realtek Semiconductor

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RTL8305S

5-PORT 10/100 MBPS SINGLE CHIP SWITCH CONTROLLER

Realtek Semiconductor 

6. Functional Description

RTL8305S

6.1 Introduction

Providing five 10/100 Mbps Ethernet channels and one MII port, the RTL8305S can be configured for either a five port 10/100

Ethernet application or a four 10/100 port Ethernet with an extra MII/SNI port. The MII/SNI port can be connected to an

external processor for routing purposes as public area network devices do, referred to as MII/SNI PHY mode, or connected to

a HomePNA physical chip or 100Base-FX PHYceiver, referred to as MII MAC mode.

In MII/SNI PHY mode, pins RXC, RXDV, and RXD correspond to TXC, TXEN, and TXD. In MII MAC mode, TXC, TXEN

and TXD correspond to RXC, RXDV and RXD.

The frame buffer is composed of 1M bits of built-in memory. The address look-up table for MAC addresses learning/searching

consists of 1K direct-mapping entries.

The RTL8305S uses Nway auto-negotiation to complete the UTP port connections of physical links which conform to IEEE

802.3u specifications. IEEE 802.3x full duplex flow control is supported. When operating in half duplex mode, a proprietary

back-pressure algorithm is implemented to prevent traditional hub devices from partitioning due to excessive collisions.

The RTL8305S supports non-blocking wire speed forwarding rates and special designs to resolve head-of-line blocking problems

and channel-capture problems. A broadcast storm filtering function is also provided for abnormal broadcast traffic issues.

6.2 Switch Core Functional Overview

6.2.1 Address Search, Learning and Aging

The RTL8305S contains a full 1K of look-up table entries and uses a direct-mapping scheme to achieve address search and

learning.

By extracting the least 10 bits of a destination MAC address to index the 1K-entry look-up table, the RTL8305S can decide

where the packet goes. If the searching result indexes to an empty entry, the packet is broadcast to all other ports. On the other

hand, the RTL8305S extracts the least 10 bits of a source MAC address to index the 1K-entry look-up table. If the result

indexes to an empty entry, it records the source MAC address and related switching information. If the result leads to an

occupied entry with different switching information, it updates the entry with the new information. This is referred to as

‘learning.’ The look-up engine will update time stamp information of an entry whenever the corresponding source MAC

address appears. If the time information is not updated for a period of time, the entry will be removed, referred to as the aging

process. The maximum aging time for the RTL8305S is approximately 300 seconds, and the minimum aging time is

approximately 200 seconds.

2002/02/19

9

Rev. 1.2

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