ITS640S2 Ver la hoja de datos (PDF) - Infineon Technologies
Número de pieza
componentes Descripción
Fabricante
ITS640S2 Datasheet PDF : 14 Pages
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PROFET® ITS 640S2
Truth Table
Normal
operation
Current-
limitation
Short circuit to
GND
Over-
temperature
Short circuit to
Vbb
Open load
Undervoltage
Overvoltage
Negative output
voltage clamp
L = "Low" Level
H = "High" Level
Input Output
level
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
level
L
H
L
H
L
L15)
L
L
H
H
L18)
H
L
L
L
L
L
Status
level
H
L
H
H
H
H
H
H
L16)
L
H (L19))
L
H
L
H
L
H
Current
Sense
IIS
0
nominal
0
0
0
0
0
0
0
<nominal 17)
0
0
0
0
0
0
0
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 11...12)
Terms
Input circuit (ESD protection)
Vbb
VIN
I IN
3 IN
I ST
ST
1
I IS
Ibb
4
Vbb
PROFET
6
OUT
7
OUT
VST VIS 5 IS
GND
2
R GND
IGND
VON
IL
VOUT
IN
RI
ESD-ZD I
II
GND
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
15) The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is
zero
16) An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
17) Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.
18) Power Transistor off, high impedance
19) with external resistor between pin 4 and pin 6&7
Infineon Technologies AG
Page 7
2006-Mar-28
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