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ISL9011IRFCZ-T Ver la hoja de datos (PDF) - Intersil

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ISL9011IRFCZ-T Datasheet PDF : 11 Pages
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Block Diagram
ISL9011
VIN
IS1
1V
QEN1
VREF
TRIM
LDO
ERROR
AMPLIFIER
LDO-1
LDO-2
VO1
~1.0V
VO1
VO2
EN1
CONTROL
LOGIC
EN2
UVLO
BANDGAP AND
TEMPERATURE
SENSOR
VOLTAGE
REFERENCE
GENERATOR
1.00V
GND
CBYP
Functional Description
The ISL9011 contains all circuitry required to implement two
high performance LDO’s. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9011 adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, staged turn-on and soft-start.
Smart Thermal shutdown protects the device against
overheating. Staged turn-on and soft-start minimize start-up
input current surges without causing excessive device turn-
on time.
Power Control
The ISL9011 has two separate enable pins, EN1 and EN2,
to individually control power to each of the LDO outputs.
When both EN1 and EN2 are low, the device is in shutdown
9
mode. During this condition, all on-chip circuits are off, and
the device draws minimum current, typically less than 0.1µA.
When one or both of the enable pins are asserted, the
device first polls the output of the UVLO detector to ensure
that VIN voltage is at least about 2.1V. Once verified, the
device initiates a start-up sequence. During the start-up
sequence, trim settings are first read and latched. Then,
sequentially, the bandgap, reference voltage and current
generation circuitry power-up. Once the references are
stable, a fast-start circuit quickly charges the external
reference bypass capacitor (connected to the CBYP pin) to
the proper operating voltage. After the bypass capacitor has
been charged, the LDO’s power-up.
If EN1 is brought high, and EN2 goes high before the VO1
output stabilizes, the ISL9011 delays the VO2 turn-on until
the VO1 output reaches its target level.
FN9219.4
June 21, 2006

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