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IS93C46D

1-KBIT SERIAL ELECTRICALLY ERASABLE PROM

Integrated Silicon Solution 

IS93C46D

AC WAVEFORMS

FIGURE 8. ERASE (REGISTER ERASE) CYCLE TIMING

tCS

CS

DIN

11 1

An An-1

A0

DOUT

tSV

tDF

BUSY

tWP

READY

Notes:

To determine data bits An - A0, see Instruction Set for the appropriate device.

FIGURE 9. ERASE ALL (ERAL) CYCLE TIMING

CS

DIN

DOUT

1 00 1 0

tCS

tSV

tDF

BUSY

tWP

READY

Note for Figures 8 and 9:

After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status

(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

11

Rev. 00G

01/15/07

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