IS61LPS12832A-200B2 Ver la hoja de datos (PDF) - Integrated Silicon Solution
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Fabricante
IS61LPS12832A-200B2
Integrated Silicon Solution
IS61LPS12832A-200B2 Datasheet PDF : 26 Pages
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IS61(64)LPS12832A
IS61(64)LPS12836A IS61(64)VPS12836A
IS61(64)LPS25618A IS61(64)VPS25618A
ISSI ®
119 BGA PACKAGE PIN CONFIGURATION
128K X 36 (TOP VIEW)
1
2
3
4
5
6
7
A
VDDQ
B
NC
A
CE2
A
ADSP
A
A
ADSC
A
A
CE2
VDDQ
NC
C
NC
A
A
VDD
A
A
NC
D
DQc
DQPc
Vss
E
DQc
DQc
Vss
F
VDDQ
G
DQc
DQc
DQc
Vss
BWc
H
DQc
DQc
Vss
NC
CE
OE
ADV
GW
Vss
Vss
Vss
BWb
Vss
DQPb
DQb
DQb
DQb
DQb
DQb
DQb
VDDQ
DQb
DQb
J
VDDQ
VDD
NC
VDD
NC
VDD
VDDQ
K
DQd
DQd
Vss
CLK
Vss
DQa
DQa
L
DQd
M
VDDQ
DQd
DQd
BWd
Vss
NC
BWE
BWa
Vss
DQa
DQa
DQa
VDDQ
N
DQd
DQd
Vss
A1*
Vss
DQa
DQa
P
DQd
DQPd
Vss
A0*
Vss
DQPa
DQa
R
NC
A
MODE
VDD
NC
A
NC
T
NC
NC
A
A
A
NC
ZZ
U
VDDQ
NC
NC
NC
NC
NC
VDDQ
Note: * A0 and A1 are the two least significant bits (LSB) of the address field and set the internal burst counter if burst is desired.
PIN DESCRIPTIONS
Symbol
A
A0, A1
ADV
ADSP
ADSC
GW
CLK
CE, CE2, CE2
BWx (x=a-d)
BWE
Pin Name
Address Inputs
Synchronous Burst Address Inputs
Synchronous Burst Address
Advance
Address Status Processor
Address Status Controller
Global Write Enable
Synchronous Clock
Synchronous Chip Select
Synchronous Byte Write Controls
Byte Write Enable
Symbol
OE
ZZ
MODE
NC
DQa-DQd
DQPa-Pd
VDD
VDDQ
Vss
Pin Name
Output Enable
Power Sleep Mode
Burst Sequence Selection
No Connect
Data Inputs/Outputs
Output Power Supply
Power Supply
Output Power Supply
Ground
4
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. 00A
10/07/04
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