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IS42S32400E Ver la hoja de datos (PDF) - Integrated Silicon Solution

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componentes Descripción
Fabricante
IS42S32400E
ISSI
Integrated Silicon Solution ISSI
IS42S32400E Datasheet PDF : 60 Pages
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IS42S32400E, IS45S32400E
FUNCTIONAL TRUTH TABLE Continued:
Current State
CS RAS CAS WE
Address
Write Recovering H ×
××
×
LH
H
H
×
LH
H
L
×
LH
L
H
BA, CA, A10
LH
L
L
BA, CA, A10
LL
H
H
BA, RA
LL
H
L
BA, A10
LL
L
H
×
LL
L
L
OC, BA
Write Recovering H ×
×
×
×
with Auto
LH
H
H
×
Precharge
LH
H
L
×
LH
L
H
BA, CA, A10
LH
L
L
BA, CA, A10
LL
H
H
BA, RA
LL
H
L
BA, A10
LL
L
H
×
LL
L
L
OC, BA
Refresh
×
×
×
LH
H
×
×
LH
L
H
BA, CA, A10
LH
L
L
BA, CA, A10
LL
H
H
BA, RA
LL
H
L
BA, A10
LL
L
H
×
LL
L
L
OC, BA
Mode Register
××
×
Accessing
LH
H
H
×
LH
H
L
×
LH
L
×
BA, CA, A10
LL
× ×
BA, RA
Command
DESL
NOP
BST
READ/READA
WRIT/ WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP/BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/WRITE
ACT/PRE/PALL
REF/MRS
Action
Nop, Enter row active after tDPL
Nop, Enter row active after tDPL
Nop, Enter row active after tDPL
Begin read (8)
Begin new write
ILLEGAL (3)
ILLEGAL (3)
ILLEGAL
ILLEGAL
Nop, Enter precharge after tDPL
Nop, Enter precharge after tDPL
Nop, Enter row active after tDPL
ILLEGAL(3,8,11)
ILLEGAL (3,11)
ILLEGAL (3,11)
ILLEGAL (3,11)
ILLEGAL
ILLEGAL
Nop, Enter idle after tRC
Nop, Enter idle after tRC
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Nop, Enter idle after 2 clocks
Nop, Enter idle after 2 clocks
ILLEGAL
ILLEGAL
ILLEGAL
Note: H=Vih, L=Vil x= Vih or Vil, V = Valid Data, BA= Bank Address, CA+Column Address, RA=Row Address, OC= Op-Code
Notes:
1. All entries assume that CKE is active (CKEn-1=CKEn=H).
2. If both banks are idle, and CKE is inactive (Low), the device will enter Power Down mode. All input buffers except CKE will be
disabled.
3. Illegal to bank in specified states; Function may be legal in the bank indicated by Bank Address (BA), depending on the state of
that bank.
4. If both banks are idle, and CKE is inactive (Low), the device will enter Self-Refresh mode. All input buffers except CKE will be
disabled.
5. Illegal if tRCD is not satisfied.
6. Illegal if tRAS is not satisfied.
7. Must satisfy burst interrupt condition.
8. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
9. Must mask preceding data which don’t satisfy tDPL.
10. Illegal if tRRD is not satisfied.
11. Illegal for single bank, but legal for other banks.
Integrated Silicon Solution, Inc. - www.issi.com
11
Rev.  D
05/18/09

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