MT4LC4M4E9TG-5 Ver la hoja de datos (PDF) - Micron Technology
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MT4LC4M4E9TG-5 Datasheet PDF : 23 Pages
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TECHNOLOGY, INC.
CAPACITANCE
PARAMETER
Input Capacitance: Address pins
Input Capacitance: RAS#, CAS#, WE#, OE#
Input/Output Capacitance: DQ
4 MEG x 4
EDO DRAM
SYMBOL
CI1
CI2
CIO
MAX
5
7
7
UNITS
pF
pF
pF
NOTES
8
8
8
AC ELECTRICAL CHARACTERISTICS
(Notes: 2, 3, 9, 10, 11, 12, 17) (VCC [MIN] ≤ VCC ≤ VCC [MAX])
AC CHARACTERISTICS
PARAMETER
Access time from column address
Column address setup to CAS# precharge
Column address hold time (referenced to RAS#)
Column address setup time
Row address setup time
Column address to WE# delay time
Access time from CAS#
Column address hold time
CAS# pulse width
CAS# LOW to “don’t care” during Self Refresh
CAS# hold time (CBR Refresh)
CAS# to output in Low-Z
Data output hold after next CAS# LOW
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR Refresh)
CAS# to WE# delay time
Write command to CAS# lead time
Data-in hold time
Data-in setup time
Output disable
Output Enable
OE# hold time from WE# during
READ-MODIFY-WRITE cycle
OE# HIGH hold from CAS# HIGH
OE# HIGH pulse width
OE# LOW to CAS# HIGH setup time
Output buffer turn-off delay
SYMBOL
tAA
tACH
tAR
tASC
tASR
tAWD
tCAC
tCAH
tCAS
tCHD
tCHR
tCLZ
tCOH
tCP
tCPA
tCRP
tCSH
tCSR
tCWD
tCWL
tDH
tDS
tOD
tOE
tOEH
tOEHC
tOEP
tOES
tOFF
-5
MIN
MAX
25
12
38
0
0
42
13
8
8
10,000
15
8
0
3
8
28
5
38
5
28
8
8
0
0
12
12
8
5
5
4
0
12
-6
MIN
MAX
30
15
45
0
0
49
15
10
10
10,000
15
10
0
3
10
35
5
45
5
35
10
10
0
0
15
15
10
10
5
5
0
15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
13
14
7
15
13
16
16
17
18
18
20
4 Meg x 4 EDO DRAM
D47.pm5 – Rev. 3/97
8
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1997, Micron Technology, Inc.
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