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Número de pieza

componentes Descripción

Fabricante

24AA04-/P

4K, 8K 2.5V I2C serial EEPROM

Microchip Technology 

24AA04/24LC04B

TABLE 1-2: AC CHARACTERISTICS

AC CHARACTERISTICS

Industrial (I):

TA = -40°C to +85°C, VCC = +1.7V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No.

Sym.

Characteristic

Min.

Typ. Max. Units

Conditions

1

FCLK

Clock frequency

—

—

400 kHz 2.5V ≤ VCC ≤ 5.5V

—

—

100

1.7V ≤ VCC < 2.5V (24AA04)

2

THIGH Clock high time

600

—

—

ns 2.5V ≤ VCC ≤ 5.5V

4000

—

—

1.7V ≤ VCC < 2.5V (24AA04)

3

TLOW Clock low time

1300

—

—

ns 2.5V ≤ VCC ≤ 5.5V

4700

—

—

1.7V ≤ VCC < 2.5V (24AA04)

4

TR

SDA and SCL rise time

—

(Note 1)

—

—

300

ns 2.5V ≤ VCC ≤ 5.5V (Note 1)

— 1000

1.7V ≤ VCC < 2.5V (24AA04)

(Note 1)

5

TF

SDA and SCL fall time

—

—

300

ns (Note 1)

—

6

THD:STA Start condition hold time

600

—

—

ns 2.5V ≤ VCC ≤ 5.5V

4000

—

—

1.7V ≤ VCC < 2.5V (24AA04)

7

TSU:STA Start condition setup

time

600

—

—

ns 2.5V ≤ VCC ≤ 5.5V

4700

—

—

1.7V ≤ VCC < 2.5V (24AA04)

8

THD:DAT Data input hold time

0

—

—

ns (Note 2)

—

9

TSU:DAT Data input setup time

100

—

—

ns 2.5V ≤ VCC ≤ 5.5V

250

—

—

1.7V ≤ VCC < 2.5V (24AA04)

10

TSU:STO Stop condition setup

time

600

—

—

ns 2.5V ≤ VCC ≤ 5.5V

4000

—

—

1.7V ≤ VCC < 2.5V (24AA04)

11

TAA

Output valid from clock

—

(Note 2)

—

—

900

ns 2.5V ≤ VCC ≤ 5.5V

— 3500

1.7V ≤ VCC < 2.5V (24AA04)

12

TBUF

Bus free time: Time the

1300

—

—

ns 2.5V ≤ VCC ≤ 5.5V

bus must be free before 4700

—

—

1.7V ≤ VCC < 2.5V (24AA04)

a new transmission can

start

13

TOF

Output fall time from VIH 20+0.1CB —

250

ns 2.5V ≤ VCC ≤ 5.5V

minimum to VIL

—

—

250

1.7V ≤ VCC < 2.5V (24AA04)

maximum

14

TSP

Input filter spike

suppression

(SDA and SCL pins)

—

—

50

ns (Notes 1 and 3)

15

TWC

Write cycle time

(byte or page)

—

—

5

ms —

16

—

Endurance

1M

—

— cycles 25°C, (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site

at www.microchip.com.

© 2009 Microchip Technology Inc.

DS21708K-page 3

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