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Fabricante

IR2110

HIGH AND LOW SIDE DRIVER

International Rectifier 

IR2110(-1-2)(S)PbF/IR2113(-1-2)(S)PbF

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-

eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured

under board mounted and still air conditions. Additional information is shown in Figures 28 through 35.

Symbol

Definition

Min.

Max. Units

VB

High side floating supply voltage (IR2110)

(IR2113)

-0.3

525

-0.3

625

VS

VHO

VCC

VLO

VDD

VSS

VIN

dVs/dt

PD

High side floating supply offset voltage

High side floating output voltage

Low side fixed supply voltage

Low side output voltage

Logic supply voltage

Logic supply offset voltage

Logic input voltage (HIN, LIN & SD)

Allowable offset supply voltage transient (figure 2)

Package power dissipation @ TA ≤ +25°C (14 lead DIP)

(16 lead SOIC)

VB - 25

VS - 0.3

-0.3

-0.3

-0.3

VCC - 25

VSS - 0.3

—

—

—

VB + 0.3

VB + 0.3

25

VCC + 0.3

VSS + 25

VCC + 0.3

VDD + 0.3

50

1.6

1.25

V

V/ns

W

RTHJA

Thermal resistance, junction to ambient

(14 lead DIP)

—

(16 lead SOIC)

—

75

°C/W

100

TJ

Junction temperature

TS

Storage temperature

TL

Lead temperature (soldering, 10 seconds)

—

150

-55

150

°C

—

300

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the

recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical

ratings at other bias conditions are shown in figures 36 and 37.

Symbol

Definition

Min.

Max. Units

VB

High side floating supply absolute voltage

VS

High side floating supply offset voltage (IR2110)

(IR2113)

VS + 10

Note 1

Note 1

VS + 20

500

600

VHO

High side floating output voltage

VS

VB

VCC

Low side fixed supply voltage

10

20

V

VLO

Low side output voltage

0

VCC

VDD

Logic supply voltage

VSS + 3

VSS + 20

VSS

Logic supply offset voltage

-5 (Note 2)

5

VIN

Logic input voltage (HIN, LIN & SD)

TA

Ambient temperature

VSS

VDD

-40

125

°C

Note 1: Logic operational for VS of -4 to +500V. Logic state held for VS of -4V to -VBS. (Please refer to the Design Tip

DT97-3 for more details).

Note 2: When VDD < 5V, the minimum VSS offset is limited to -VDD.

2

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