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IDT7M1002S30G

16K x 32 CMOS DUAL-PORT STATIC RAM MODULE

Integrated Device Technology 

IDT7M1002

16K x 32 CMOS DUAL-PORT STATIC RAM MODULE

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TIMING WAVEFORM OF READ CYCLE NO. 1, EITHER SIDE (1, 2, 4)

tRC

ADDRESS

tAA

DATAOUT

PREVIOUS

DATA VALID

tOH

tOH

DATA VALID

2795 drw 05

TIMING WAVEFORM OF READ CYCLE NO. 2, EITHER SIDE (1, 3, 5)

tSOP

tACE

CS

tSOP

tAOE

OE

tOLZ (6)

DATAOUT

ICC

CURRENT

ISB

tPU (6)

tCLZ (6)

50%

NOTES:

1. R/W is HIGH for Read Cycles

2. Device is continuously enabled CS ≤ VIL. This waveform cannot be used for semaphore reads.

3. Addresses valid prior to or coincident with CS transition LOW.

4. OE ≤ VIL

5. To access RAM, CS ≤ VIL and SEM ≥ VIH. To access semaphore, CS ≥ VIH and SEM ≤ VIL.

6. This parameter is guaranteed by design but not tested.

tCHZ (6)

tOHZ (6)

DATA VALID

tPD (6)

50%

2795 drw 06

7.02

6

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