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IDT7164L15D

CMOS STATIC RAM 64K (8K x 8-BIT)

Integrated Device Technology 

IDT7164S/L

CMOS STATIC RAM 64K (8K x 8-BIT)

TIMING WAVEFORM OF READ CYCLE NO. 1(1)

tRC

ADDRESS

OE

CS2

CS1

DATA OUT

tAA

tOE

tOLZ (5)

tACS2

tCLZ2(5)

tACS1

tCLZ1 (5)

TIMING WAVEFORM OF READ CYCLE NO. 2(1, 2, 4)

tRC

ADDRESS

DATA OUT

tAA

tOH

TIMING WAVEFORM OF READ CYCLE NO. 3(1, 3, 4)

CS1

MILITARY AND COMMERCIAL TEMPERATURE RANGES

tOH

(5)

tCHZ2

DATA VALID

tOHZ (5)

tCHZ1 (5)

2967 drw 05

tOH

DATA VALID

2967 drw 06

CS2

DATA OUT

POWER ICC

SUPPLY

CURRENT ISB

tACS2

tCLZ2 (5)

tACS1

tCLZ1 (5)

tPU

NOTES:

1. WE is HIGH for Read cycle.

2. Device is continuously selected, CS1 is LOW, CS2 is HIGH.

3. Address valid prior to or coincident with CS1 transition LOW and CS2 transition HIGH.

4. OE is LOW.

5. Transition is measured ±200mV from steady state.

6.1

DATA VALID

tCHZ2 (5)

tCHZ1 (5)

tPD

2967 drw 07

7

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