IDT49C465AG Ver la hoja de datos (PDF) - Integrated Device Technology
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IDT49C465AG Datasheet PDF : 38 Pages
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IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
PARTIAL-WORD-WRITE OPERATIONS
FOR COMMON I/O MEMORIES:
MILITARY AND COMMERCIAL TEMPERATURE RANGES
CORRECTION
BLOCK
SD BUS
BYTE 3
BYTE 2
BYTE 1
BYTE 0
B3
B2
B1
B0
BYTE
MUX
MD BUS
BYTE 3
BYTE 2
BYTE 1
MAIN
MEMORY
BYTE 0
B3 = 1
B2 = 1
B1 = 1
B0 = 0
A3
8
A2
8
8
A1
CHECKBIT
GENERATOR
A0
8
CBO
CHECKBIT
CBI
MEMORY
IDT49C465
2552 drw 14
In order to perform a partial-word-write operation, the
complete word in question must be read from memory. This
must be done in order to correct any error which may have
occurred in the old word. Once the complete, corrected word
is available, with all the bytes verified, the new word may be
assembled in the byte mux and the new checkbits generated.
The example shown above illustrates the case of combin-
ing 3 bytes from an old word with a new lower order byte to
form a new word. The new word, along with the new checkbits,
may now be written to memory.
In the separate I/O memory configuration, the situation is
similar except that the new word is output on the SD Bus
instead of the MD Bus (refer to previous page).
11.7
12
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