ICS9248YF-77 Ver la hoja de datos (PDF) - Integrated Circuit Systems
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ICS9248YF-77 Datasheet PDF : 14 Pages
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ICS9248-77
Byte 1: CPU, Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
40
38
37
42
47
46
2
3
PWD
1
1
1
1
1
1
1
1
Description
CPUCLK 0
CPUCLK 1
CPUCLK 2
CPU/2
IOAPIC0
IOAPIC1
REF1
REF0
Note:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 2: PCI Active/Inactive Register
(1 = enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
18
17
15
14
12
11
9
8
PWD
1
1
1
1
1
1
1
1
Description
PCICLK7
PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK_F
Notef:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 3: 3V66 Active/Inactive Register (1 =
enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
34
33
32
-
-
-
-
-
PWD
1
1
1
X
1
1
X
X
Description
3V66_0
3V66_1
3V66_2
FS1#
(Reserved)
(Reserved)
FS3#
FS2#
Note:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 4: PCI Active/Inactive Register (1 =
enable, 0 = disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin #
26
27
-
22
21
20
-
-
PWD
1
1
X
1
1
1
1
1
Description
24_48MHz
48MHz
FS0
PCICLK10
PCICLK9
PCICLK8
(Reserved)
(Reserved)
Note:
1. Inactive means outputs are held LOW and are disabled
from switching.
Byte 5: Active/Inactive Register
(1= enable, 0 = disable)
Bit
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
Pin #
-
-
-
-
-
-
-
-
PWD
0
0
0
0
0
1
1
0
Description
Reserved (Note)
Reserved (Note)
Reserved (Note)
Reserved (Note)
Reserved (Note)
Reserved (Note)
Reserved (Note)
Reserved (Note)
Note: Dont write into this register, writing into this register
can cause malfunction
7
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