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ICS91730 Ver la hoja de datos (PDF) - Integrated Circuit Systems

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componentes Descripción
Fabricante
ICS91730
ICST
Integrated Circuit Systems ICST
ICS91730 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
ICS91730
Table 1: Frequency Configuration Table
(See I2C Byte 0)
14in/27out
FS4
0
0
0
0
0
0
0
0
0
0
0
0
FS3
0
0
0
0
0
0
0
0
1
1
1
1
FS2
0
0
0
0
1
1
1
1
0
0
0
0
FS1
0
0
1
1
0
0
1
1
0
0
1
1
FS0
0
1
0
1
0
1
0
1
0
1
0
1
Sprd Type Sprd %
0.60
DOWN
0.80
SPREAD
1.00
(-)
1.25
1.50
2.00
CENTER SPD 0.50
(+/-)
1.00
DOWN
0.60
SPREAD 1.00
(-)
0.80
CTR SPD 0.3
0
1
1
0
0
1.50
0
14in/14out
0
1
1
1
1
0
1
1
0
DOWN
SPREAD
1.75
(-)
2.00
27in/27out
0
1
1
1
1
2.50
1
0
0
0
0
3.00
1
0
0
0
1
1.25
1
0
0
1
0
0.40
1
0
0
1
1
0.50
1
0
1
0
0 CENTER SPD 0.70
1
0
1
0
1
(+/-)
1.00
1
0
1
1
0
1.20
1
0
1
1
1
1.50
1
1
0
0
0
0.60
1
1
1
1
0
0
0
1
1
0
DOWN
0.80
SPREAD
1.00
48in/48out
1
1
0
1
1
(-)
1.25
66in/66out
1
1
1
0
0
1.50
1
1
1
0
1
2.00
1
1
1
1
0 CENTER SPD 0.50
1
1
1
1
1
(+/-)
1.00
Above is the hard coded 5 bit (32 entry) ROM table.
FS3:0 are ONLY accessible through I2C software programming bits (byte0 bits5:7). FS4 can also be decoded from
FS_IN1 latched input hardware pins.
FS_IN1 FS4. Upon power-up the default is to use hardware selection of FS_IN1 latched value.
FS3 = 0, FS2 = 0, FS1 = 0, FS0 = 1 upon power-up (refer to the functionality table on page 1).
To access non-default spread entries in the ROM, byte0 programming should be used. In order to change the power
up default of FS_IN1 = 1 (-1.25% down spread) to any other spread % entry, first change byte0bit 0 to software
selection by switching this bit to a ‘1’ and then program the desired percentage by changing byte0 bits 7:3.
0794D—05/23/05
3

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