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ICS8535-21 Ver la hoja de datos (PDF) - Integrated Circuit Systems

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ICS8535-21 Datasheet PDF : 14 Pages
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Integrated
Circuit
Systems, Inc.
ICS8535-21
LOW SKEW, 1-TO-2
LVCMOS/LVTTL-TO-3.3V LVPECL FANOUT BUFFER
TABLE 3A. CONTROL INPUT FUNCTION TABLE
Inputs
Outputs
CLK_EN
CLK_SEL
Selected Source
Q0, Q1
nQ0, nQ1
0
0
CLK0
Disabled; LOW
Disabled; HIGH
0
1
CLK1
Disabled; LOW
Disabled; HIGH
1
0
CLK0
Enabled
Enabled
1
1
CLK1
Enabled
Enabled
After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge
as show in Figure 1.
In the active mode, the state of the outputs are a function of the CLK0 and CLK1 inputs as described in Table 3B.
CLK0, CLK1
CLK_EN
Disabled
Enabled
nQ0, nQ1
Q0, Q1
FIGURE 1. CLK_EN TIMING DIAGRAM
TABLE 3B. CLOCK INPUT FUNCTION TABLE
Inputs
CLK0 or CLK1
0
1
Q0, Q1
LOW
HIGH
Outputs
nQ0, nQ1
HIGH
LOW
8535AG-21
www.icst.com/products/hiperclocks.html
3
REV. A OCTOBER 20, 2004

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