MULTIPLIER AND ZERO DELAY BUFFER
DATASHEET
ICS570-01
Description
The ICS570-01 is a high-performance Zero Delay Buffer
(ZDB) which integrates IDT’s proprietary mixed signal
Phased Lock Loop (PLL) techniques. The zero delay feature
means that the rising edge of the input clock aligns with the
rising edges of the output clock, giving the appearance of no
delay through the device. The device includes an on-chip
ROM table with nine different mulitplication factors, allowing
it to generate many common output frequencies from a
single input.
Features
• 8-pin MSOP package (3.00 mm x 3.00 mm body)
• Available in Pb (lead) free package
• Low input to output skew of 300 ps max
• Can recover degraded input clock duty cycle
• Output clock duty cycle of 45/55
• Power Down and Tri-State Mode
• Accepts spread spectrum clock inputs
• Advanced, low power CMOS process
• 3.3 V operation
• Industrial temperature version available
Block Diagram
Power
S1:0 2
ICLK
PLL
FBIN
CLK
GND
IDT™ / ICS™ MULTIPLIER AND ZERO DELAY BUFFER
1
ICS570-01 REV B 072706