ICS345 Ver la hoja de datos (PDF) - Integrated Circuit Systems
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ICS345 Datasheet PDF : 7 Pages
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ICS345
Triple PLL Field Programmable SS VersaClock Synthesizer
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85° C
Parameter
Symbol
Conditions
Min. Typ.
Input Frequency
FIN Fundamental crystal
5
Input clock
2
Output Frequency
VDD=3.3 V
0.25
Output Rise Time
Output Fall Time
Duty Cycle
tOR 20% to 80%, Note 1
tOF 80% to 20%, Note 1
Note 2
1
1
40 49-51
Power-up time
PLL lock-time from
4
power-up, Note 3
PDTS goes high until
0.2
stable CLK output,
Spread Spectrum Off,
Note 3
PDTS goes high until
4
stable CLK output,
Spread Spectrum On,
Note 3
One Sigma Clock Period Jitter
Configuration
50
Dependent
Maximum Absolute Jitter
tja
Deviation from Mean.
Configuration
Dependent
+200
Pin-to-Pin Skew
Low Skew Outputs
-250
Max. Units
27 MHz
50 MHz
200 MHz
ns
ns
60
%
10 ms
2
ms
7
ms
ps
ps
250 ps
Note 1: Measured with 15pF load
Note 2: Duty Cycle is configuration dependent. Most configurations are min 45% / max 55%
Note 3: ICS test mode output occurs for first 170 clock cycles on CLK7 for each PLL powered up. PDTS
transition high on select address change.
Thermal Characteristics
Parameter
Symbol Conditions
Thermal Resistance Junction to
Ambient
θJA Still air
θJA 1 m/s air flow
θJA 3 m/s air flow
Thermal Resistance Junction to Case θJC
Min.
Typ.
135
93
78
60
Max.
Units
°C/W
°C/W
°C/W
°C/W
MDS 345 D
6
Revision 090704
Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
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