HV57908 Ver la hoja de datos (PDF) - Supertex Inc

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HV57908

8MHz, 64-Channel Serial to Parallel Converter with Push-Pull Outputs

Supertex Inc 

HV57908

DC Electrical Characteristics (Over recommended operating conditions unless otherwise noted, TA = -40°C to +85°C)

Sym Parameter

Min

Max Units Conditions

IDD

VDD supply current

IPP

High voltage supply current

-

15

mA VDD = VDD max, fCLK = 8.0MHz

-

100

µA Outputs high

-

100

µA Outputs low

IDDQ

Quiescent VDD supply current

VOH

High level output

HVOUT

DOUT

VOL

Low level output

HVOUT

DOUT

IIH

High-level logic input current

IIL

Low-level logic input current

VOC High voltage clamp diode

-

100

65

-

VDD -0.5V

-

-

7.0

-

0.5

-

1.0

-

-1.0

-

1.0

µA All VIN = VDD

V IO = -15mA, VPP = +80V

V IO = -100µA

V IO = +12mA, VPP = +80V

V IO = 100µA

µA VIH = VDD

µA VIL = 0V

V IOC = 1.0mA

AC Electrical Characteristics (TA = +85°C max. Logic signal inputs and data inputs have tr, tf ≤ 5.0ns [10% and 90% points])

Sym Parameter

Min

Max Units Conditions

fCLK

Clock frequency

-

8.0 MHz Per register

tWL, tWH Clock width high or low

62

-

ns ---

tSU

Data set-up time before clock rises

10

-

ns ---

tH

Data hold time after clock rises

15

-

ns ---

tON, tOFF Time from latch enable to HVOUT

-

500

ns CL = 15pF

tDHL

Delay time clock to data high to low

-

70

ns CL = 15pF

tDLH

Delay time clock to data low to high

-

70

ns CL = 15pF

tDLE* Delay time clock to LE low to high

25

-

ns ---

tWLE

LE pulse width

25

-

ns ---

tSLE

LE set-up time before clock rises

0

-

ns ---

Note:

* tDLE is not required but is recommended to produce stable HV outputs and thus minimize power dissipation and current spikes

(allows internal SR output to stabilize).

Doc.# DSFP-HV57908

A061913

Supertex inc.

3

www.supertex.com

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