ICS85357-01(2001) Ver la hoja de datos (PDF) - Integrated Circuit Systems

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ICS85357-01
(Rev.:2001)

4:1 OR 2:1 DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER

Integrated Circuit Systems 

Integrated

Circuit

Systems, Inc.

ICS85357-01

4:1 OR 2:1

DIFFERENTIAL-TO-3.3V LVPECL / ECL CLOCK MULTIPLEXER

3. Calculations and Equations.

The purpose of this section is to derive the power dissipated into the load.

LVPECL output driver circuit and termination are shown in Figure 8.

VCC

Q1

V

OUT

RL

50

VCC - 2V

Figure 8 - LVPECL Driver Circuit and Termination

To calculate worst case power dissipation into the load, use the following equations which assume a 50Ω load, and a termination

voltage of V - 2V.

CC

Pd_H is power dissipation when the output drives high.

Pd_L is the power dissipation when the output drives low.

Pd_H = [(V – (V - 2V))/R ] * (V - V )

OH_MAX

CC_MAX

L

CC_MAX OH_MAX

Pd_L = [(V – (V - 2V))/R ] * (V - V )

OL_MAX

CC_MAX

L

CC_MAX OL_MAX

• For logic high, V = V

=V

– 1.0V

OUT

OH_MAX

CC_MAX

Using V

= 3.465, this results in V

= 2.465V

CC_MAX

OH_MAX

• For logic low, V = V = V – 1.7V

OUT

OL_MAX

CC_MAX

Using V = 3.465, this results in V = 1.765V

CC_MAX

OL_MAX

Pd_H = [(2.465V - (3.465V - 2V))/50Ω] * (3.465V - 2.465V) = 20mW

Pd_L = [(1.765V - (3.465V - 2V))/50Ω] * (3.465V - 1.765V) = 10.2mW

Total Power Dissipation per output pair = Pd_H + Pd_L = 30.2mW

85357AG-01

www.icst.com/products/hiperclocks.html

9

REV. A JULY 16, 2001

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