HV514(2008) Ver la hoja de datos (PDF) - Supertex Inc
Número de pieza
componentes Descripción
Fabricante
HV514
(Rev.:2008)
(Rev.:2008)
Supertex Inc
HV514 Datasheet PDF : 7 Pages
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HV514
DC Electrical Characteristics (Over typical operating conditions unless otherwise specified, TJ = 25OC)
Sym Parameter
Min Typ Max Units Conditions
IDD VDD supply current
IDDQ Quiescent VDD supply current
IPP VPP supply current
-
-
4.0 mA fCLK = 8.0MHz, LE = Low
-
-
0.1
mA All VIN = VDD
-
- 2.0
All VIN = 0V
-
-
100
µA
VPP = 250V, fOUT = 300Hz,
no load
IPPQ Quiescent VPP supply current
IIH High-level logic input current
IIL Low-level logic input current
-
- 100 µA VPP = 240V, outputs are static
-
-
10
µA VIH = VDD
-
- -10
VIL = 0V
-
-
-350
µA VIL = 0V
for inputs w/pull-up resistors
IDPP Dynamic IPP
VOH High level output
VOL Low level output
HVOUT
Data out
HVOUT
Data out
-
-
140
-
VDD -1.0V -
-
-
-
-
0.1 mA fOUT = 100kHz, no load
-
V
VPP = 200V, IHVOUT = -20mA
-
IDOUT = -0.1mA
60
V
VDD = 4.5V, IHVOUT = 20mA
1.0
IDOUT = 0.1mA
AC Electrical Characteristics (Over typical operating conditions unless otherwise specified, TJ = 25OC)
Sym Parameter
Min Typ Max Units Conditions
fCLK Clock frequency
0
- 8.0 MHz ---
fOUT Output switching frequency (SOA limited)
-
300 -
Hz CL = 50nF, VPP = 200V
tW Clock width high and low
62
-
-
ns ---
tSU Data setup time before clock rises
15
-
-
ns ---
tH Data hold time after clock rises
30
-
-
ns ---
tWLE Width of latch enable pulse
80
-
-
ns ---
tDLE LE delay time after rising edge of clock
35
-
-
ns ---
tSLE LE setup time before rising edge of clock
40
-
-
ns ---
tOR, tOF HVOUT rise/fall time
-
- 1000 µs CL = 100nF, VPP = 200V
td ON/OFF Delay time for output to start rise/fall
-
- 500 ns ---
tDHL Delay time clock to DOUT high to low
-
- 110 ns CL = 15pF
tDLH Delay time clock to DOUT low to high
-
- 110 ns CL = 15pF
tR, tF All logic inputs
-
- 5.0 ns ---
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
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