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HT32F1252 Ver la hoja de datos (PDF) - Holtek Semiconductor

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HT32F1252 Datasheet PDF : 35 Pages
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32-bit ARM Cortexâ„¢-M3 MCU
HT32F1251/51B/52/53
2 Features
Core
▀ 32-bit ARM® Cortex™-M3 processor core
â–€ Up to 72MHz operation frequency
â–€ 1.25 DMIPS/MHz (Dhrystone 2.1)
â–€ Single-cycle multiplication and hardware division
â–€ Integrated Nested Vectored Interrupt Controller (NVIC)
â–€ 24-bit SysTick timer
The Cortexâ„¢-M3 processor is a general-purpose 32-bit processor core especially suitable for
products requiring high performance and low power consumption microcontrollers. It offers many
new features such as a Thumb-2 instruction set, hardware divider, low latency interrupt respond
time, atomic bit-banding access and multiple buses for simultaneous accesses. The Cortexâ„¢-M3
processor is based on the ARMv7 architecture and supports both Thumb and Thumb-2 instruction
sets. Some system peripherals listed below are also provided by Cortexâ„¢-M3:
â–€ Internal Bus Matrix connected with ICode bus, DCode bus, System bus, Private Peripheral Bus
(PPB) and debug accesses (AHB-AP)
â–€ Nested Vectored Interrupt Controller (NVIC)
â–€ Flash Patch and Breakpoint (FPB)
â–€ Data Watchpoint and Trace (DWT)
â–€ Instrument Trace Macrocell (ITM)
â–€ Memory Protection Unit (MPU)
â–€ Serial Wire Debug Port (SW-DP)
â–€ Embedded Trace Macrocell (ETM)
â–€ Trace Port Interface Unit (TPIU)
On-chip Memory
â–€ 9 to 32KB on-chip Flash memory for instruction/data and option storage
â–€ 2 to 8KB on-chip SRAM
â–€ Supports several boot modes
The ARM® Cortex™-M3 processor is structured in Harvard architecture which can use separate
buses to fetch instructions and load/store data. The instruction code and data are both located in the
same memory address space but in different address ranges. The maximum address range of the
Cortexâ„¢-M3 is 4GB since it has a 32-bit bus address width. Additionally, a pre-defined memory
map is provided by the Cortexâ„¢-M3 processor to reduce the software complexity of repeated
implementation of different device vendors. However, some regions are used by the ARM®
Cortex™-M3 system peripherals. Refer to the ARM® Cortex™-M3 Technical Reference Manual
for more information. The Figure  2. HT32F125x Memory Map shows the memory map of the
HT32F125x series of devices, including Code, SRAM, peripheral, and other pre-defined regions.
Rev. 1.10
7 of 35
April 13, 2012

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