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HT46R51-18

A/D Type 8-Bit OTP MCU

Holtek Semiconductor 

HT46R51/HT46R52

The lower byte of the PC (PCL) is a readable and

writeable register (06H). Moving data into the PCL per-

forms a short jump. The destination is within 256 loca-

tions.

When a control transfer takes place, an additional

dummy cycle is required.

Program Memory - EPROM

The program memory is used to store the program in-

structions which are to be executed. It also contains

data, table, and interrupt entries, and is organized into

1024´14 (HT46R51) or 2048´14 (HT46R52) bits, ad-

dressed by the Program Counter and table pointer.

Certain locations in the ROM are reserved for special

usage:

· Location 000H

This location is reserved for program initialization. Af-

ter a chip reset, the program always begins execution

at location 000H.

· Location 004H

This location is reserved for the external interrupt ser-

vice program. If the INT input pin is activated, the in-

terrupt is enabled and the stack is not full, the program

begins execution at this location.

· Location 008H

This location is reserved for the timer/event counter

interrupt service program. If a timer interrupt results

from a timer/event counter overflow, and the interrupt

is enabled and the stack is not full, the program begins

execution at location 008H.

000H

004H

008H

00C H

010H

014H

018H

D e v ic e In itia liz a tio n P r o g r a m

E x te r n a l In te r r u p t S u b r o u tin e

T im e r /E v e n t C o u n te r In te r r u p t S u b r o u tin e

A /D C o n v e r te r In te r r u p t S u b r o u tin e

P ro g ra m

M e m o ry

· Location 00CH

Location 00CH is reserved for the A/D converter inter-

rupt service program. If an A/D converter interrupt re-

sults from an end of A/D conversion, and if the

interrupt is enabled and the stack is not full, the pro-

gram begins execution at location 00CH.

· Table location

Any location in the program memory can be used as

look-up tables. The instructions ²TABRDC [m]² (the

current page) and ²TABRDL [m]² (the last page) trans-

fer the contents of the lower-order byte to the speci-

fied data memory, and the higher-order byte to TBLH

(08H). The lower-order byte table pointer TBLP (07H)

are read/write registers, which indicate the table loca-

tions. Before accessing the table, the location has to

be placed in TBLP. The TBLH is read only and cannot

be restored. If the main routine and the ISR (interrupt

service routine) both employ the table read instruc-

tion, the contents of the TBLH in the main routine are

likely to be changed by the table read instruction used

in the ISR. Errors can occur. Given this, using the ta-

ble read instruction in the main routine and the ISR si-

multaneously should be avoided. However, if the table

read instruction has to be applied in both main routine

and the ISR, the interrupt should be disabled prior to

the table read instruction. It will not be enabled until

the TBLH in the main routine has been backed-up. All

table related instructions require 2 cycles to complete

the operation.

000H

004H

008H

00C H

010H

014H

018H

D e v ic e In itia liz a tio n P r o g r a m

E x te r n a l In te r r u p t S u b r o u tin e

T im e r /E v e n t C o u n te r In te r r u p t S u b r o u tin e

A /D C o n v e r te r In te r r u p t S u b r o u tin e

P ro g ra m

M e m o ry

n00H

nFFH

L o o k - u p T a b le ( 2 5 6 w o r d s )

300H

L o o k - u p T a b le ( 2 5 6 w o r d s )

3FFH

N o te : n = 0 ~ 3

1 4 b its

H T46R 51

n00H

nFFH

L o o k - u p T a b le ( 2 5 6 w o r d s )

700H

L o o k - u p T a b le ( 2 5 6 w o r d s )

7FFH

N o te : n = 0 ~ 7

1 4 b its

H T46R 52

Program Memory

Rev. 1.40

6

July 12, 2005

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