HMN2M8D-120 Ver la hoja de datos (PDF) - Hanbit Electronics Co.,Ltd

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Fabricante

HMN2M8D-120

Non-Volatile SRAM MODULE 16Mbit (2,048K x 8-Bit), 36Pin-DIP, 5V

Hanbit Electronics Co.,Ltd 

HANBit

HMN2M8D

POWER-DOWN/POWER-UP CYCLE (TA= TOPR, VCC=5V)

PARAMETER

SYMBOL

CONDITIONS

MIN

VCC slew, 4.75 to 4.25V

tPF

300

VCC slew, 4.75 to VSO

tFS

10

VCC slew, VSO to VPFD (max)

tPU

0

Chip enable recovery time

Time during which SRAM

tCER

is write-protected after VCC

passes VPFD on power-up.

40

Data-retention time in

Absence of VCC

tDR

TA = 25℃

5

Write-protect time

Delay after Vcc slews down

tWPT

past VPFD before SRAM is

Write-protected.

40

TYP.

-

-

-

MAX

-

-

-

UNIT

㎲

㎲

㎲

80

120

ms

-

-

years

100

150

㎲

TIMING WAVEFORM

- Read Cycle No.1 (Address Access)*1,2

Address

DOUT

tRC

tACC

tOH

Previous Data Valid

- Read Cycle No.2 (/CE Access)*1,3,4

tRC

/CE

DOUT

tACE

tCLZ

High-Z

Data Valid

tCHZ

High-Z

URL : www.hbe.co.kr

Rev. 1.0 (May, 2002)

6

HANBit Electronics Co.,Ltd

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