TTSI4K32T3BAL Ver la hoja de datos (PDF) - Agere -> LSI Corporation

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TTSI4K32T3BAL

4096-Channel, 32-Highway Time-Slot Interchanger

Agere -> LSI Corporation 

TTSI4K32T

4096-Channel, 32-Highway Time-Slot Interchanger

Data Sheet

June 2000

Contents

Table of Contents

Page

Features .................................................................................................................................................................. 1

Applications ............................................................................................................................................................. 1

Description............................................................................................................................................................... 1

Functional Description ............................................................................................................................................. 5

Pin Information ........................................................................................................................................................ 7

Typical TSI Application .......................................................................................................................................... 15

Interchange Fabric................................................................................................................................................. 16

Small and Large TSIs ............................................................................................................................................ 17

Microprocessor Interface ....................................................................................................................................... 18

Asynchronous Mode (MM = 0)........................................................................................................................... 18

Synchronous Mode (MM = 1) ............................................................................................................................ 19

Mixed-Highway Data Rates ................................................................................................................................... 20

TDM Highway Interface Timing ............................................................................................................................. 21

Virtual and Physical Frames .............................................................................................................................. 21

TDM Highway Alignment at Zero Offset ............................................................................................................ 22

TDM Highway Offsets............................................................................................................................................ 22

Reset Sequence .................................................................................................................................................... 23

Low-Latency and Frame-Integrity Modes .............................................................................................................. 24

Low Latency....................................................................................................................................................... 24

Frame Integrity................................................................................................................................................... 25

Test-Pattern Generation ........................................................................................................................................ 28

Test-Pattern Checking........................................................................................................................................... 28

Error Injection ........................................................................................................................................................ 29

Error Checking....................................................................................................................................................... 29

JTAG Boundary-Scan Specification ...................................................................................................................... 30

Principle of the Boundary Scan.......................................................................................................................... 30

Test Access Port Controller ............................................................................................................................... 31

Instruction Register ............................................................................................................................................ 33

Boundary-Scan Register.................................................................................................................................... 34

BYPASS Register .............................................................................................................................................. 34

IDCODE Register............................................................................................................................................... 34

3-State Procedures ............................................................................................................................................ 34

Register Architecture ............................................................................................................................................. 35

Configuration Register Architecture....................................................................................................................... 37

Transmit Highway 3-State Options .................................................................................................................... 50

Data Store Memory ............................................................................................................................................... 51

Connection Store Memory..................................................................................................................................... 51

Absolute Maximum Ratings................................................................................................................................... 54

Operating Conditions............................................................................................................................................. 54

Handling Precautions ............................................................................................................................................ 54

Electrical Characteristics ....................................................................................................................................... 55

Timing Characteristics ........................................................................................................................................... 55

Outline Diagram..................................................................................................................................................... 62

217-Pin PBGA.................................................................................................................................................... 62

Ordering Information.............................................................................................................................................. 63

DS99-178PDH Replaces DS98-291TIC to Incorporate the Following Updates .................................................... 63

2

Lucent Technologies Inc.

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