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29205BXA

8K x 8 Asynchronous CMOS Static RAM

Intersil 

HM-65642

March 1997

8K x 8 Asynchronous

CMOS Static RAM

Features

Description

• Full CMOS Design

• Six Transistor Memory Cell

• Low Standby Supply Current . . . . . . . . . . . . . . . .100µA

• Low Operating Supply Current . . . . . . . . . . . . . . . 20mA

• Fast Address Access Time . . . . . . . . . . . . . . . . . . 150ns

• Low Data Retention Supply Voltage. . . . . . . . . . . . 2.0V

• CMOS/TTL Compatible Inputs/Outputs

• JEDEC Approved Pinout

• Equal Cycle and Access Times

• No Clocks or Strobes Required

• Gated Inputs

• No Pull-Up or Pull-Down Resistors Required

• Easy Microprocessor Interfacing

• Dual Chip Enable Control

The HM-65642 is a CMOS 8192 x 8-bit Static Random

Access Memory. The pinout is the JEDEC 28 pin, 8-bit wide

standard, which allows easy memory board layouts which

accommodate a variety of industry standard ROM, PROM,

EPROM, EEPROM and RAMs. The HM-65642 is ideally

suited for use in microprocessor based systems. In particu-

lar, interfacing with the Intersil 80C86 and 80C88 micropro-

cessors is simplified by the convenient output enable (G)

input.

The HM-65642 is a full CMOS RAM which utilizes an array

of six transistor (6T) memory cells for the most stable and

lowest possible standby supply current over the full military

temperature range. In addition to this, the high stability of the

6T RAM cell provides excellent protection against soft errors

due to noise and alpha particles. This stability also improves

the radiation tolerance of the RAM over that of four transistor

or MIX-MOS (4T) devices.

Ordering Information

PACKAGE

CERDIP

JAN#

TEMPERATURE

RANGE

-40oC to +85oC

-55oC to +125oC

(NOTE 1)

150ns/75µA

-

29205BXA

NOTE:

1. Access Time/Data Retention Supply Current.

(NOTE 1)

150ns/150µA

HM1-65642-9

-

(NOTE 1)

200ns/250µA

-

-

PKG. NO.

F28.6

F28.6

Pinout

HM-65642 (CERDIP)

TOP VIEW

NC 1

A12 2

A7 3

A6 4

A5 5

A4 6

A3 7

A2 8

A1 9

A0 10

DQ0 11

DQ1 12

DQ2 13

GND 14

28 VCC

27 W

26 E2

25 A8

24 A9

23 A11

22 G

21 A10

20 E1

19 DQ7

18 DQ6

17 DQ5

16 DQ4

15 DQ3

PIN

A

DQ

E1

E2

W

G

NC

GND

VCC

DESCRIPTION

Address Input

Data Input/Output

Chip Enable

Chip Enable

Write Enable

Output Enable

No Connections

Ground

Power

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999

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