HIP9022 Ver la hoja de datos (PDF) - Intersil
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HIP9022 Datasheet PDF : 10 Pages
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HIP9022
Electrical Specifications TJ = 100οC, VDD = 12V, VCC = 5V, VEE = -5V, INVERT Low (Figure 1 Configuration)
Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX UNITS
Driver Maximum Output Current
Shunt Controller Switching Frequency
ANALOG SAMPLE/HOLD AMPLIFIERS
IDRSW
fSC
-1
-
1
A
0
-
2.5
MHz
Low Level Input Voltage
Low Level Input Current
High Level Input Voltage
Minimum Hysteresis
Analog Input Voltage Range
Minimum Sample/Hold Pulse Width
Droop Rate, Constant Current Addresses #’s 1, 2
VIL
IIL
VIH
VHYS
VIN
0
-140
3.5
0.3
0
-
-
-
1.5
V
-
-
µA
-
VCC + 0.3
V
-
-
V
-
VCC - 0.2
V
10
-
µs
-
0.006
V/s
Droop Rate, Other Addresses #’s 3 - 8
-
-
0.06
V/s
Maximum Analog Multiplexing Frequency
-
-
30
kHz
DIAGNOSTIC OUTPUT (DIAG Output)
Voltage Follower Voltage Range
VO
Voltage Follower Maximum Clamp Voltage
VCL
O. C. (OVER CURRENT) COMPARATOR (OC1, 2 Outputs)
0
-
VCC - 0.2
V
-
-
VCC + 0.3
V
Threshold (%) O.C. Detection
Programmed Current
-
140
-
%
as Ref.
Output Voltage, Low Level
VOL
Output Current, Low Level
IOL
Output Voltage, High Level
VOH
Output Current, High Level
IOH
TEC REF. RESISTOR AND DRIVE OUTPUT
0
-
1.5
V
-
12
-
mA
3.5
-
VCC - 0.5
V
-
4
-
mA
TECREFR Output Voltage to Reference Resistor
VREFR
TECGDR1, 2 Drive Output Voltage
VTECG
OVER/UNDER TEMPERATURE COMPARATOR (To OT Output)
1.71
1.9
2.09
V
0
-
9
V
Under Temp. Limit
Over Temp. Limit
Output Voltage, Low Level
Output Current, Low Level
Output Voltage, High Level
Output Current, High Level
RELAY DRIVER
TLOW
THIGH
VOL
IOL
VOH
IOH
2.07
2.1
2.13
V
1.67
1.7
1.73
V
0
-
1.5
V
-
12
-
mA
3.5
-
VCC - 0.5
V
-
4
-
mA
Driver Output Current
Drain to Source Resistance
LASER PROTECTION DIODES See Figure 1
IRLY
rDS(ON)
-
-
30
mA
-
20
-
Ω
Maximum Diode Forward Voltage Drop
VLDX, 10A Peak Current
-
-
2
V
VESDX
Maximum Reverse Diode Current
ILDX
-
-
1
µA
NOTE:
2. The drive control sets the high and low voltages to the gate of the Power FET driver (shunt switch). Both the upper and lower levels are set by
values held in two of the sample/hold amplifiers. External capacitors at VUP1, 2 and VLOW1, 2 are required for stabilization.
4-6
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