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HIP4080A(1995) Ver la hoja de datos (PDF) - Intersil

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HIP4080A Datasheet PDF : 15 Pages
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HIP4080A
Pin Descriptions
PIN
NUMBER SYMBOL
DESCRIPTION
1
BHB B High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of boot-
strap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this
pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
2
HEN High-side Enable input. Logic level input that when low overrides IN+/IN- (Pins 6 and 7) to put AHO and BHO
drivers (Pins 11 and 20) in low output state. When HEN is high AHO and BHO are controlled by IN+/IN- inputs.
The pin can be driven by signal levels of 0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will
hold HEN high, so no connection is required if high-side and low-side outputs are to be controlled by IN+/IN-
inputs.
3
DIS
DISable input. Logic level input that when taken high sets all four outputs low. DIS high overrides all other inputs.
When DIS is taken low the outputs are controlled by the other inputs. The pin can be driven by signal levels of
0V to 15V (no greater than VDD). An internal 100µA pull-up to VDD will hold DIS high if this pin is not driven.
4
VSS
Chip negative supply, generally will be ground.
5
OUT OUTput of the input control comparator. This output can be used for feedback and hysteresis.
6
IN+
Noninverting input of control comparator. If IN+ is greater than IN- (Pin 7) then ALO and BHO are low level out-
puts and BLO and AHO are high level outputs. If IN+ is less than IN- then ALO and BHO are high level outputs
and BLO and AHO are low level outputs. DIS (Pin 3) high level will override IN+/IN- control for all outputs. HEN
(Pin 2) low level will override IN+/IN- control of AHO and BHO. When switching in four quadrant mode, dead
time in a half bridge leg is controlled by HDEL and LDEL (Pins 8 and 9).
7
IN-
Inverting input of control comparator. See IN+ (Pin 6) description.
8
HDEL High-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay
of both high-side drivers. The low-side drivers turn-off with no adjustable delay, so the HDEL resistor guarantees
no shoot-through by delaying the turn-on of the high-side drivers. HDEL reference voltage is approximately 5.1V.
9
LDEL Low-side turn-on DELay. Connect resistor from this pin to VSS to set timing current that defines the turn-on delay
of both low-side drivers. The high-side drivers turn-off with no adjustable delay, so the LDEL resistor guarantees
no shoot-through by delaying the turn-on of the low-side drivers. LDEL reference voltage is approximately 5.1V.
10
AHB A High-side Bootstrap supply. External bootstrap diode and capacitor are required. Connect cathode of boot-
strap diode and positive side of bootstrap capacitor to this pin. Internal charge pump supplies 30µA out of this
pin to maintain bootstrap supply. Internal circuitry clamps the bootstrap supply to approximately 12.8V.
11
AHO A High-side Output. Connect to gate of A High-side power MOSFET.
12
AHS A High-side Source connection. Connect to source of A High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
13
ALO A Low-side Output. Connect to gate of A Low-side power MOSFET.
14
ALS
A Low-side Source connection. Connect to source of A Low-side power MOSFET.
15
VCC
Positive supply to gate drivers. Must be same potential as VDD (Pin 16). Connect to anodes of two bootstrap
diodes.
16
VDD
Positive supply to lower gate drivers. Must be same potential as VCC (Pin 15). De-couple this pin to VSS (Pin 4).
17
BLS
B Low-side Source connection. Connect to source of B Low-side power MOSFET.
18
BLO B Low-side Output. Connect to gate of B Low-side power MOSFET.
19
BHS B High-side Source connection. Connect to source of B High-side power MOSFET. Connect negative side of
bootstrap capacitor to this pin.
20
BHO B High-side Output. Connect to gate of B High-side power MOSFET.
5

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