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G692L293TC Ver la hoja de datos (PDF) - Global Mixed-mode Technology Inc

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G692L293TC
GMT
Global Mixed-mode Technology Inc GMT
G692L293TC Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Global Mixed-mode Technology Inc.
G692/G693
Applications Information
Negative-Going VCC Transients
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, the
G693L/G692H/G692L are relatively immune to short-
duration negative-going VCC transients (glitches).
Figure1 shows typical transient duration vs. reset
comparator overdrive, for which the G693L/G692H/
G692L do not generate a reset pulse. The graph was
generated using a negative-going pulse applied to VCC,
starting 0.5V above the actual reset threshold and
ending below it by the magnitude indicated (reset
comparator overdrive). The graph indicates the maxi-
mum pulse width a negative-going VCC transient can
have without causing a reset pulse. As the magnitude
of the transient increases (goes farther below the reset
threshold), the maximum allowable pulse width de-
creases. Typically, for the G69_ _463 and G69_ _438,
a VCC transient that goes 100mV below the reset
threshold and lasts 15µs or less will not cause a reset
pulse. A 0.1µF bypass capacitor mounted as close as
possible to the VCC pin provides additional transient
immunity.
Ensuring a Valid Reset Output Down to VCC = 0
When VCC falls below 1V, the G692 RESET output no
longer sinks current—it becomes an open circuit.
Therefore, high-impedance CMOS logic inputs con-
nected to RESET can drift to undetermined voltages.
This presents no problem in most applications since
most µP and other circuitry is inoperative with VCC be-
low 1V. However, in applications where RESET must
be valid down to 0V, adding a pull-down resistor to
RESET causes any stray leakage currents to flow to
ground, holding RESET low (Figure 2). R1’s value is
not critical; 100kΩ is large enough not to load RESET
and small enough to pull RESET to ground.
A 100kΩ pull-up resistor to VCC is also recommended
for the G693L if RESET is required to remain valid for
VCC < 1V.
VCC
VCC
G693
RESET
RPULL-UP
VCC
µP
RESET MOTOROLA
INPUT 68HCXX
GND
GND
Figure 3. Interfacing to µPs with Bidirectional Reset
I/O
+3.3V
VCC
G693
RESET
+5.0V
RPULL-UP
VCC
5V SYSTEM
RESET
INPUT
GND
GND
Figure 4. G693L Open-Drain RESET Output Allows
Use with Multiple Supplies
Interfacing to µPs with Bidirectional Reset Pins
Since the RESET output on the G693L is open drain,
this device interfaces easily with µPs that have bidirec-
tional reset pins, such as the Motorola 68HC11. Con-
necting the µP supervisor’s RESET output directly to
the microcontroller’s (µC’s) RESET pin with a single
pull-up resistor allows either device to assert reset
(Figure 3).
G693L Open-Drain RESET Output Allows Use with
Multiple Supplies
Generally, the pull-up connected to the G693L will
connect to the supply voltage that is being monitored at
the IC’s VCC pin. However, some systems may use the
open-drain output to level-shift from the monitored sup-
ply to reset circuitry powered by some other supply
(Figure 4). Note that as the G693L’s VCC decreases
below 1V, so does the IC’s ability to sink current at
RESET . Also, with any pull-up, RESET will be pulled
high as VCC decays toward 0. The voltage where this
occurs depends on the pull-up resistor value and the
voltage to which it is connected.
Benefits of Highly Accurate Reset Threshold
Most µP supervisor ICs have reset threshold voltages
between 5% and 10% below the value of nominal sup-
ply voltages. This ensures a reset will not occur within
5% of the nominal supply, but will occur when the sup-
ply is 10% below nominal.
When using ICs rated at only the nominal supply ±5%,
this leaves a zone of uncertainty where the supply is
between 5% and 10% low, and where the reset may or
may not be asserted.
The G69_ _463/G69_ _308 use highly accurate circuitry
to ensure that reset is asserted close to the 5% limit,
and long before the supply has declined to 10% below
nominal.
Ver: 1.0
Sep 23, 2002
TEL: 886-3-5788833
http://www.gmt.com.tw
6

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