GL831A Ver la hoja de datos (PDF) - Genesys Logic

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componentes Descripción

Fabricante

GL831A

USB 2.0 to SATA Bridge Controller

Genesys Logic 

GL831A Datasheet

3.2 Pin List

Table 3.1 - Pin List

Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type Pin# Pin Name Type

1 BUSY O 17 DEVICE1 I 33 INTRQ B 49 RTERM A

2

DD7

B 18 HOST

I 34

VDD

P 50 PLLVDD P

3

DD8

B 19

DD2

B 35 CVDD P 51 PLLVDD P

4 HRST_ I 20 DD13

B 36

DA1

B 52 PLLVSS P

5

DD6

B 21

DD1

B 37

DA0

B 53 TXVSS P

6

DD9

B 22 DD14

B 38

DA2

B 54 TXVDD P

7

DD5

B 23

DD0

B 39 CS0_

B 55

TXP

O

8

CVDD

P 24 DD15

B 40

CS1_

B 56 TXN

O

9

VDD

P 25 CVDD P 41 GND

P 57 RXN

I

10

GND

P 26 GND

P 42 VDD

P 58

RXP

I

11 DD10

B 27

VDD

P 43 GND

P 59 RXVDD P

12 TEST

I 28 DMARQ B 44 VDD

P 60 RXVSS P

13

DD4

B 29 DIOW_ B 45

X2

B 61 CVDD P

14 DD11 B 30 DIOR_ B 46

X1

I 62 GND

P

15

DD3

B 31 IORDY B 47 CVDD P 63 RESET# B

16 DD12

B 32 DMACK_ B 48

GND

P 64 SPDSEL I

3.3 Pin Descriptions

Table 3.2 - Pin Descriptions

Pin Name

DD0~15

RESET#

CS1_, CS0_

DA0~2

INTRQ

ATA/ ATAPI Interface (Host mode)

Pin# Type

Description

23, 21,

19, 15,

13, 7, 5,

2, 3, 6, 11,

B

IDE Data Bus

14, 16,

20, 22, 24

63

I

(pu)

Device Reset

40, 39

I

(pu)

Chip Select #1,#0

37, 36, 38

I

(pd)

IDE Address #2,#1,#0

33

O IDE interrupt input

©2009 Genesys Logic, Inc. - All rights reserved.

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