GL800HT25 Ver la hoja de datos (PDF) - GENESYS LOGIC

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Fabricante

GL800HT25

USB 2.0 UTMI Compliant Transceiver IP Core

GENESYS LOGIC 

GL800HT25 USB 2.0 UTMI Compliant Transceiver IP Core

Revision History

Revision

1.0

1.1

1.2

1.21

1.22

1.23

1.24

1.30

Date

Description

02/22/2002

06/21/2002

07/10/2002

07/16/2002

07/29/2002

08/02/2002

08/12/2002

First draft release

1. Remove Optional Output Signals in Sec.VII.

2. Add Testing Circuit in Sec.IX.

3. Add IX.6 application circuit for tester.

Modify VII.2 Interface port description.

(1) Pad descriptions are separated from interface signals.

(2) Use the same pad names and pad order as layout.

(3) Add description for bonding options.

1. Insert table for operation mode in Sec IX.2

2. Add some description on analogue test.

1. Insert table for pin description while in testing.

2. Add some description on analogue test.

3. More description on layout guide.

1. Revert Figure 7.3 horizontally.

2. CLKOUT -> CLK30.

Re-organize layout recommendation

11/28/2002 Modify pin description of DVDD1 of test sample.

©2000-2003 Genesys Logic Inc.—All rights reserved.

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