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FX009A Ver la hoja de datos (PDF) - CML Microsystems Plc

Número de pieza
componentes Descripción
Fabricante
FX009A Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
Application Notes
V SS
SERIAL CLOCK INPUT
LOAD/LATCH
LOAD/LATCH
CHANNEL 1 INPUT
CHANNEL 2 INPUT C 2
CHANNEL 3 INPUT
CHANNEL 4 INPUT C 4
CHANNEL 5 INPUT
CHANNEL 6 INPUT C 6
CHANNEL 7 INPUT
CHANNEL 8 INPUT C 8
C 10
C1
C3
C5
C7
V BIAS
C9
V DD
1
24
2
23
3
22
4
21
5 FX009A 20
6
19
7 J - LG - LS 18
8
17
9
16
10
15
11
14
12
13
V DD
X
V SS
SERIAL CONTROL DATA INPUT
CHANNEL 1 OUTPUT
CHANNEL 2 OUTPUT
CHANNEL 3 OUTPUT
CHANNEL 4 OUTPUT
CHANNEL 5 OUTPUT
CHANNEL 6 OUTPUT
CHANNEL 7 OUTPUT
CHANNEL 8 OUTPUT
Notes
VSS
(1) Channel Amplifiers 1 to 8 are inverting amplifiers.
(2) Analogue input capacitors C1 to C8 are only required for a.c.
input signals, d.c. input signals do not require these
components.
Fig.2 External Component Connections
Component
C1 to C8
C9
C10
Tolerances: C = ± 20%
Unit Value
0.1µ
1.0µ
1.0µ
Application Recommendations
To avoid excess noise and instability in the final installation it is recommended that the following points be noted.
(a) A noisy or badly regulated power supply can
cause instability and/or variance of selected gains.
(b) Care should be taken on the design and layout of
the printed circuit board.
(c) All external components (Figure 2) should be
kept close to the FX009A package.
(d) Inputs and outputs should be screened wherever
possible.
(e) Tracks should be kept short.
(f) Analogue tracks should not run parallel to digital
tracks.
(g) A "Ground Plane" connected to V will assist in
SS
eliminating external pick-up on the channel input and
output pins.
(h) Do not run high-level output tracks close to low-
level input tracks.
(i) Input signal amplitudes should be applied with due
regard to Figure 3.
SINAD (dB)
60
50
Input Frequency = 1.0kHz
Input Level 0dB ref: = 775mVrms
Ch1 to Ch8 Gain Set to 0dB
40
30
10.0
25.0
75.0 110.0
250.0
-40
-30
-20 -17
-10
Fig.3 SINAD vs Input Level – Typical Values
3
1000.0
775.0
1730.0
mVrms
0
7
dB
INPUT LEVEL

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