4 Megabit (512K x 8-Bit) SRAM
32C408B
TABLE 4. 32C408B AC CHARACTERISTICS FOR READ CYCLE
(VCC=5V +/- 10%, TA = -55 TO +1‘25C, UNLESS OTERWISE SPECIFIED
PARAMETER
SYMBOL
SUBGROUPS
MIN
TYP
MAX
UNIT
Read Cycle Time
-20
-25
-30
tRC
9, 10, 11
ns
20
--
--
25
--
--
30
--
--
Address Access Time
-20
-25
-30
tAA
9, 10, 11
--
--
--
ns
--
20
--
25
--
30
Chip Select Access Time
-20
-25
-30
tCO
9, 10, 11
--
--
--
ns
--
20
--
25
--
30
Output Enable to Output Valid
-20
-25
-30
tOE
9, 10, 11
--
--
--
--
10
ns
--
12
--
14
Chip Select to Output in Low-Z
-20
-25
-30
tLZ
9, 10, 11
ns
--
3
--
--
3
--
--
3
--
Output Enable to Output in Low-Z
-20
-25
-30
tOLZ
9, 10, 11
ns
--
0
--
--
0
--
--
0
--
Chip Deselect to Output in High-Z
-20
-25
-30
tHZ
9, 10, 11
ns
--
5
--
--
6
--
--
8
--
Output Disable to Output in High-Z
-20
-25
-30
tOHZ
9, 10, 11
ns
--
5
--
--
6
--
--
8
--
Output Hold from Address Change
-20
-25
-30
tOH
9, 10, 11
ns
3
--
--
5
--
--
5
--
--
Chip Select to Power Up Time
-20
-25
-30
tPU
9, 10, 11
ns
--
0
--
--
0
--
--
0
--
Chip Select to Power Down Time
-20
-25
-30
tPD
9, 10, 11
ns
--
10
--
--
15
--
--
20
--
05.02.02 Rev 7
All data sheets are subject to change without notice 3
©2002 Maxwell Technologies
All rights reserved.