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componentes Descripción

Fabricante

FSEZ1317A

Primary-Side-Regulation PWM with POWER MOSFET Integrated

Fairchild Semiconductor 

Marking Information

Pin Configuration

F: Fairchild Logo

Z: Plant Code

X: 1-Digit Year Code

Y: 1-Digit Week Code

TT: 2-Digit Die Run Code

T: Package Type (M=SOP)

P: Y=Green Package

M: Manufacture Flow Code

Figure 4. Top Mark

Figure 5. Pin Configuration

Pin Definitions

Pin #

1

2

3

4

5

7

8

Name

CS

VDD

GND

COMR

VS

HV

DRAIN

Description

Current Sense. This pin connects a current-sense resistor, to detect the MOSFET current for

peak-current-mode control in CV mode, and provides the output-current regulation in CC mode.

Power Supply. IC operating current and MOSFET driving current are supplied using this pin.

This pin is connected to an external VDD capacitor of typically 10µF. The threshold voltages for

startup and turn-off are 16V and 5V, respectively. The operating current is lower than 5mA.

Ground

Cable Compensation. This pin connects a 1µF capacitor between the COMR and GND pins

for compensation voltage drop due to output cable loss in CV mode.

Voltage Sense. This pin detects the output voltage information and discharge time based on

voltage of auxiliary winding.

High Voltage. This pin connects to bulk capacitor for high-voltage startup.

Driver Output. Power MOSFET drain. This pin is the high-voltage power MOSFET drain.

© 2010 Fairchild Semiconductor Corporation

FSEZ1317A • Rev. 1.0.1

3

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