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FSD200B Ver la hoja de datos (PDF) - Fairchild Semiconductor

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componentes Descripción
Fabricante
FSD200B
Fairchild
Fairchild Semiconductor Fairchild
FSD200B Datasheet PDF : 18 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
FSD210B, FSD200B
4. Protection Circuit : The FSD200B/210B have 2 self-
protection functions : over load protection (OLP) and
thermal shutdown (TSD). Because these protection circuits
are fully integrated inside the IC without external compo-
nents, the reliability is improved without increasing cost.
Once a fault condition occurs, switching is terminated and
the Sense FET remains off. This causes Vcc to fall. When
Vcc reaches the UVLO stop voltage VSTOP (6.7V-
FSD210B, 6V-FSD200B), the protection is reset and the
internal high voltage current source charges the Vcc
capacitor via the Vstr pin. When Vcc reaches the UVLO
start voltage VSTART (8.7V-FSD210B, 7V-FSD200B), the
device resumes its normal operation. In this manner, the
auto-restart can alternately enable and disable the switching
of the power Sense FET until the fault condition is elimi-
nated.
VFB
4.5V
Over Load Protection
3V
t12= CFB×(V(t2)-V(t1)) / IDELAY
t1
t2 t
t12
=
C FB
V (t2 ) V (t1 ) ;
I DELAY
I DELAY = 5µ A, V (t1 ) = 3V , V (t2 ) = 4.5V
Figure 10. Over Load Protection (OLP)
OSC
Vfb
4
Cfb
5uA 400uA
+
-
R
OLP
RESET
4.5V TSD
SQ
R
GATE
DRIVER
SQ
R
A/R
FSD2xxB
OLP, TSD
Protection Block
4.2 Thermal Shutdown (TSD) : The Sense FET and the
control IC are integrated, making it easier for the control IC
to detect the temperature of the Sense FET. When the
temperature exceeds approximately 145°C, thermal
shutdown is activated.
Figure 9. Protection Block
4.1 Over Load Protection (OLP) : Overload is defined as
the load current exceeding a pre-set level due to an
unexpected event. In this situation, the protection circuit
should be activated in order to protect the SMPS. However,
even when the SMPS is operating normally, the over load
protection (OLP) circuit can be activated during the load
transition. In order to avoid this undesired operation, the
OLP circuit is designed to be activated after a specified time
to determine whether it is a transient situation or an overload
situation. In conjunction with the Ipk current limit pin (if
used) the current mode feedback path would limit the current
in the Sense FET when the maximum PWM duty cycle is
attained. If the output consumes more than this maximum
power, the output voltage (Vo) decreases below its rating
voltage. This reduces the current through the opto-coupler
LED, which also reduces the opto-coupler transistor current,
thus increasing the feedback voltage (VFB). If VFB exceeds
3V, the feedback input diode is blocked and the 5uA current
source (IDELAY) starts to charge Cfb slowly up to Vcc. In
this condition, VFB increases until it reaches 4.5V, when the
switching operation is terminated as shown in Figure 10. The
shutdown delay time is the time required to charge Cfb from
3V to 4.5V with 5uA current source.
5. Soft Start : FSD200B/210B has an internal soft start
circuit that gradually increases current through the Sense
FET as shown in Figure 11. The soft start time is 3msec in
FSD200B/210B.
I(A)
3ms
0.2A
0.25A
0.3A
t
Figure 11. Internal Soft Start
10

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